traffic.fit.qmsg

一个简单的交通灯程序(包括验证,主程序,和译码程序),在ALTER DE2板上实现

{ "Info" "IFITAPI_FITAPI_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "7.070 ns register register " "Info: Estimated most critical path is register to register delay of 7.070 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns east_west\[3\]~reg0 1 REG LAB_X40_Y26 6 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X40_Y26; Fanout = 6; REG Node = 'east_west\[3\]~reg0'" {  } { { "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" "" { Report "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/FPGA/EDA4.3/traffic/db/traffic.quartus_db" { Floorplan "E:/FPGA/EDA4.3/traffic/" "" "" { east_west[3]~reg0 } "NODE_NAME" } "" } } { "traffic.vhd" "" { Text "E:/FPGA/EDA4.3/traffic/traffic.vhd" 18 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.173 ns) + CELL(0.378 ns) 1.551 ns east_west\[7\]~914 2 COMB LAB_X42_Y26 1 " "Info: 2: + IC(1.173 ns) + CELL(0.378 ns) = 1.551 ns; Loc. = LAB_X42_Y26; Fanout = 1; COMB Node = 'east_west\[7\]~914'" {  } { { "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" "" { Report "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/FPGA/EDA4.3/traffic/db/traffic.quartus_db" { Floorplan "E:/FPGA/EDA4.3/traffic/" "" "1.551 ns" { east_west[3]~reg0 east_west[7]~914 } "NODE_NAME" } "" } } { "traffic.vhd" "" { Text "E:/FPGA/EDA4.3/traffic/traffic.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.152 ns) + CELL(0.664 ns) 2.367 ns east_west\[7\]~915 3 COMB LAB_X42_Y26 5 " "Info: 3: + IC(0.152 ns) + CELL(0.664 ns) = 2.367 ns; Loc. = LAB_X42_Y26; Fanout = 5; COMB Node = 'east_west\[7\]~915'" {  } { { "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" "" { Report "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/FPGA/EDA4.3/traffic/db/traffic.quartus_db" { Floorplan "E:/FPGA/EDA4.3/traffic/" "" "0.816 ns" { east_west[7]~914 east_west[7]~915 } "NODE_NAME" } "" } } { "traffic.vhd" "" { Text "E:/FPGA/EDA4.3/traffic/traffic.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.606 ns) + CELL(0.210 ns) 3.183 ns reduce_nor~2 4 COMB LAB_X42_Y26 1 " "Info: 4: + IC(0.606 ns) + CELL(0.210 ns) = 3.183 ns; Loc. = LAB_X42_Y26; Fanout = 1; COMB Node = 'reduce_nor~2'" {  } { { "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" "" { Report "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/FPGA/EDA4.3/traffic/db/traffic.quartus_db" { Floorplan "E:/FPGA/EDA4.3/traffic/" "" "0.816 ns" { east_west[7]~915 reduce_nor~2 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.180 ns) + CELL(0.636 ns) 3.999 ns process0~2 5 COMB LAB_X42_Y26 9 " "Info: 5: + IC(0.180 ns) + CELL(0.636 ns) = 3.999 ns; Loc. = LAB_X42_Y26; Fanout = 9; COMB Node = 'process0~2'" {  } { { "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" "" { Report "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/FPGA/EDA4.3/traffic/db/traffic.quartus_db" { Floorplan "E:/FPGA/EDA4.3/traffic/" "" "0.816 ns" { reduce_nor~2 process0~2 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.815 ns) + CELL(0.664 ns) 5.478 ns led\[5\]~576 6 COMB LAB_X40_Y26 1 " "Info: 6: + IC(0.815 ns) + CELL(0.664 ns) = 5.478 ns; Loc. = LAB_X40_Y26; Fanout = 1; COMB Node = 'led\[5\]~576'" {  } { { "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" "" { Report "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/FPGA/EDA4.3/traffic/db/traffic.quartus_db" { Floorplan "E:/FPGA/EDA4.3/traffic/" "" "1.479 ns" { process0~2 led[5]~576 } "NODE_NAME" } "" } } { "traffic.vhd" "" { Text "E:/FPGA/EDA4.3/traffic/traffic.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.818 ns) + CELL(0.664 ns) 6.960 ns led\[5\]~577 7 COMB LAB_X44_Y26 1 " "Info: 7: + IC(0.818 ns) + CELL(0.664 ns) = 6.960 ns; Loc. = LAB_X44_Y26; Fanout = 1; COMB Node = 'led\[5\]~577'" {  } { { "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" "" { Report "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/FPGA/EDA4.3/traffic/db/traffic.quartus_db" { Floorplan "E:/FPGA/EDA4.3/traffic/" "" "1.482 ns" { led[5]~576 led[5]~577 } "NODE_NAME" } "" } } { "traffic.vhd" "" { Text "E:/FPGA/EDA4.3/traffic/traffic.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.110 ns) 7.070 ns led\[5\]~reg0 8 REG LAB_X44_Y26 4 " "Info: 8: + IC(0.000 ns) + CELL(0.110 ns) = 7.070 ns; Loc. = LAB_X44_Y26; Fanout = 4; REG Node = 'led\[5\]~reg0'" {  } { { "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" "" { Report "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/FPGA/EDA4.3/traffic/db/traffic.quartus_db" { Floorplan "E:/FPGA/EDA4.3/traffic/" "" "0.110 ns" { led[5]~577 led[5]~reg0 } "NODE_NAME" } "" } } { "traffic.vhd" "" { Text "E:/FPGA/EDA4.3/traffic/traffic.vhd" 18 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.326 ns 47.04 % " "Info: Total cell delay = 3.326 ns ( 47.04 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.744 ns 52.96 % " "Info: Total interconnect delay = 3.744 ns ( 52.96 % )" {  } {  } 0}  } { { "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" "" { Report "E:/FPGA/EDA4.3/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/FPGA/EDA4.3/traffic/db/traffic.quartus_db" { Floorplan "E:/FPGA/EDA4.3/traffic/" "" "7.070 ns" { east_west[3]~reg0 east_west[7]~914 east_west[7]~915 reduce_nor~2 process0~2 led[5]~576 led[5]~577 led[5]~reg0 } "NODE_NAME" } "" } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0}