fsm_moore.smp_dump.txt

有关VHDL的Moore状态机程序

State Machine - |FSM_Moore|sreg
Name sreg.a11 sreg.a00 sreg.a1 sreg.a0 sreg.init 
sreg.init 0 0 0 0 0 
sreg.a0 0 0 0 1 1 
sreg.a1 0 0 1 0 1 
sreg.a00 0 1 0 0 1 
sreg.a11 1 0 0 0 1