main1.hier_info

Infrared telecontrol design based on the the VHDL includes the mode of infrared send,receive mode,ke

|main1
key[0] => Equal0.IN7
key[0] => Equal1.IN7
key[0] => Equal2.IN7
key[0] => Equal3.IN7
key[0] => Equal4.IN7
key[0] => Equal5.IN7
key[0] => Equal6.IN7
key[0] => Equal7.IN7
key[0] => Equal8.IN7
key[0] => Equal9.IN7
key[0] => Equal10.IN7
key[0] => Equal11.IN7
key[0] => Equal12.IN7
key[0] => Add12.IN8
key[1] => Equal0.IN6
key[1] => Equal1.IN6
key[1] => Equal2.IN6
key[1] => Equal3.IN6
key[1] => Equal4.IN6
key[1] => Equal5.IN6
key[1] => Equal6.IN6
key[1] => Equal7.IN6
key[1] => Equal8.IN6
key[1] => Equal9.IN6
key[1] => Equal10.IN6
key[1] => Equal11.IN6
key[1] => Equal12.IN6
key[1] => Add12.IN7
key[2] => Equal0.IN5
key[2] => Equal1.IN5
key[2] => Equal2.IN5
key[2] => Equal3.IN5
key[2] => Equal4.IN5
key[2] => Equal5.IN5
key[2] => Equal6.IN5
key[2] => Equal7.IN5
key[2] => Equal8.IN5
key[2] => Equal9.IN5
key[2] => Equal10.IN5
key[2] => Equal11.IN5
key[2] => Equal12.IN5
key[2] => Add12.IN6
key[3] => Equal0.IN4
key[3] => Equal1.IN4
key[3] => Equal2.IN4
key[3] => Equal3.IN4
key[3] => Equal4.IN4
key[3] => Equal5.IN4
key[3] => Equal6.IN4
key[3] => Equal7.IN4
key[3] => Equal8.IN4
key[3] => Equal9.IN4
key[3] => Equal10.IN4
key[3] => Equal11.IN4
key[3] => Equal12.IN4
key[3] => Add12.IN5
keysign => Selector35.IN7
keysign => pro2~0.IN0
keysign => State~15.OUTPUTSELECT
keysign => State~16.OUTPUTSELECT
keysign => State~17.OUTPUTSELECT
keysign => State~18.OUTPUTSELECT
keysign => State~19.OUTPUTSELECT
keysign => State~20.OUTPUTSELECT
keysign => State~21.OUTPUTSELECT
keysign => State~22.OUTPUTSELECT
keysign => State~23.OUTPUTSELECT
keysign => State~24.OUTPUTSELECT
keysign => State~25.OUTPUTSELECT
keysign => State~26.OUTPUTSELECT
keysign => State~27.OUTPUTSELECT
keysign => State~28.OUTPUTSELECT
keysign => State~29.OUTPUTSELECT
keysign => State~150.OUTPUTSELECT
keysign => State~151.OUTPUTSELECT
keysign => State~152.OUTPUTSELECT
keysign => State~153.OUTPUTSELECT
keysign => State~154.OUTPUTSELECT
keysign => State~155.OUTPUTSELECT
keysign => State~156.OUTPUTSELECT
keysign => State~157.OUTPUTSELECT
keysign => State~158.OUTPUTSELECT
keysign => State~159.OUTPUTSELECT
keysign => State~160.OUTPUTSELECT
keysign => State~161.OUTPUTSELECT
keysign => State~162.OUTPUTSELECT
keysign => State~163.OUTPUTSELECT
keysign => State~164.OUTPUTSELECT
keysign => State~166.OUTPUTSELECT
keysign => Selector36.IN8
keysign => State~167.OUTPUTSELECT
keysign => State~170.OUTPUTSELECT
keysign => State~171.OUTPUTSELECT
keysign => State~172.OUTPUTSELECT
keysign => State~173.OUTPUTSELECT
keysign => State~221.OUTPUTSELECT
keysign => State~222.OUTPUTSELECT
keysign => State~223.OUTPUTSELECT
keysign => State~224.OUTPUTSELECT
keysign => State~225.OUTPUTSELECT
keysign => State~226.OUTPUTSELECT
keysign => State~227.OUTPUTSELECT
keysign => State~228.OUTPUTSELECT
keysign => State~229.OUTPUTSELECT
keysign => State~230.OUTPUTSELECT
keysign => State~231.OUTPUTSELECT
keysign => State~232.OUTPUTSELECT
keysign => State~233.OUTPUTSELECT
keysign => State~234.OUTPUTSELECT
keysign => State~235.OUTPUTSELECT
keysign => State~242.OUTPUTSELECT
keysign => State~243.OUTPUTSELECT
keysign => Selector45.IN8
keysign => Selector44.IN7
keysign => Selector44.IN8
keysign => Selector35.IN8
keysign => Selector35.IN9
clk => save1[0].CLK
clk => save1[1].CLK
clk => save1[2].CLK
clk => save1[3].CLK
clk => save1[4].CLK
clk => save1[5].CLK
clk => save1[6].CLK
clk => save1[7].CLK
clk => save1[8].CLK
clk => save1[9].CLK
clk => save1[10].CLK
clk => save1[11].CLK
clk => save2[1].CLK
clk => save2[2].CLK
clk => save2[3].CLK
clk => save2[4].CLK
clk => save2[5].CLK
clk => save2[6].CLK
clk => save2[7].CLK
clk => save2[8].CLK
clk => save2[9].CLK
clk => save2[10].CLK
clk => save2[11].CLK
clk => dataout12_tmp[0].CLK
clk => dataout12_tmp[1].CLK
clk => dataout12_tmp[2].CLK
clk => dataout12_tmp[3].CLK
clk => dataout12_tmp[4].CLK
clk => dataout12_tmp[5].CLK
clk => dataout12_tmp[6].CLK
clk => dataout12_tmp[7].CLK
clk => dataout12_tmp[8].CLK
clk => dataout12_tmp[9].CLK
clk => dataout12_tmp[10].CLK
clk => dataout12_tmp[11].CLK
clk => dataled_tmp[0].CLK
clk => dataled_tmp[1].CLK
clk => dataled_tmp[2].CLK
clk => cnt[0].CLK
clk => cnt[1].CLK
clk => cnt[2].CLK
clk => cnt[3].CLK
clk => ring_tmp.CLK
clk => \pro2:change2.CLK
clk => \pro2:change.CLK
clk => \pro2:sec3[0].CLK
clk => \pro2:sec3[1].CLK
clk => \pro2:sec3[2].CLK
clk => \pro2:sec3[3].CLK
clk => \pro2:sec2[0].CLK
clk => \pro2:sec2[1].CLK
clk => \pro2:sec2[2].CLK
clk => \pro2:sec2[3].CLK
clk => \pro2:sec1[0].CLK
clk => \pro2:sec1[1].CLK
clk => \pro2:sec1[2].CLK
clk => \pro2:sec1[3].CLK
clk => State~244.IN1
ring <= ring_tmp.DB_MAX_OUTPUT_PORT_TYPE
dataout12[0] <= dataout12_tmp[0].DB_MAX_OUTPUT_PORT_TYPE
dataout12[1] <= dataout12_tmp[1].DB_MAX_OUTPUT_PORT_TYPE
dataout12[2] <= dataout12_tmp[2].DB_MAX_OUTPUT_PORT_TYPE
dataout12[3] <= dataout12_tmp[3].DB_MAX_OUTPUT_PORT_TYPE
dataout12[4] <= dataout12_tmp[4].DB_MAX_OUTPUT_PORT_TYPE
dataout12[5] <= dataout12_tmp[5].DB_MAX_OUTPUT_PORT_TYPE
dataout12[6] <= dataout12_tmp[6].DB_MAX_OUTPUT_PORT_TYPE
dataout12[7] <= dataout12_tmp[7].DB_MAX_OUTPUT_PORT_TYPE
dataout12[8] <= dataout12_tmp[8].DB_MAX_OUTPUT_PORT_TYPE
dataout12[9] <= dataout12_tmp[9].DB_MAX_OUTPUT_PORT_TYPE
dataout12[10] <= dataout12_tmp[10].DB_MAX_OUTPUT_PORT_TYPE
dataout12[11] <= dataout12_tmp[11].DB_MAX_OUTPUT_PORT_TYPE
dataled[0] <= dataled_tmp[0].DB_MAX_OUTPUT_PORT_TYPE
dataled[1] <= dataled_tmp[1].DB_MAX_OUTPUT_PORT_TYPE
dataled[2] <= dataled_tmp[2].DB_MAX_OUTPUT_PORT_TYPE