📄 de2_lcm_test.map.rpt
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; I/O pins ; 425 ;
; Total PLLs ; 1 ;
; Maximum fan-out node ; KEY[0] ;
; Maximum fan-out ; 74 ;
; Total fan-out ; 703 ;
; Average fan-out ; 1.10 ;
+---------------------------------------------+--------+
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+---------------------------------+-------------------+--------------+-------------+------+--------------+---------+-----------+------+--------------+---------------------------------------------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; M4Ks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ;
+---------------------------------+-------------------+--------------+-------------+------+--------------+---------+-----------+------+--------------+---------------------------------------------------+
; |DE2_LCM_Test ; 133 (65) ; 81 (34) ; 0 ; 0 ; 0 ; 0 ; 0 ; 425 ; 0 ; |DE2_LCM_Test ;
; |I2S_LCM_Config:u4| ; 68 (21) ; 47 (20) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_LCM_Test|I2S_LCM_Config:u4 ;
; |I2S_Controller:u0| ; 47 (47) ; 27 (27) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_LCM_Test|I2S_LCM_Config:u4|I2S_Controller:u0 ;
; |LCM_PLL:u0| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_LCM_Test|LCM_PLL:u0 ;
; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_LCM_Test|LCM_PLL:u0|altpll:altpll_component ;
+---------------------------------+-------------------+--------------+-------------+------+--------------+---------+-----------+------+--------------+---------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+-------------------------------------------------------------------+
; State Machine - |DE2_LCM_Test|I2S_LCM_Config:u4|mSetup_ST ;
+----------------+----------------+----------------+----------------+
; Name ; mSetup_ST.0000 ; mSetup_ST.0010 ; mSetup_ST.0001 ;
+----------------+----------------+----------------+----------------+
; mSetup_ST.0000 ; 0 ; 0 ; 0 ;
; mSetup_ST.0001 ; 1 ; 0 ; 1 ;
; mSetup_ST.0010 ; 1 ; 1 ; 0 ;
+----------------+----------------+----------------+----------------+
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 81 ;
; Number of registers using Synchronous Clear ; 52 ;
; Number of registers using Synchronous Load ; 0 ;
; Number of registers using Asynchronous Clear ; 71 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 35 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+----------------------------------------------------+
; Inverted Register Statistics ;
+------------------------------------------+---------+
; Inverted Register ; Fan out ;
+------------------------------------------+---------+
; I2S_LCM_Config:u4|I2S_Controller:u0|mSEN ; 1 ;
; Total number of inverted registers = 1 ; ;
+------------------------------------------+---------+
+------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed) ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+
; 3:1 ; 2 bits ; 4 LEs ; 2 LEs ; 2 LEs ; Yes ; |DE2_LCM_Test|MOD_3[0] ;
; 4:1 ; 7 bits ; 14 LEs ; 14 LEs ; 0 LEs ; No ; |DE2_LCM_Test|LCM_DATA[1] ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+
+------------------------------------------------------------+
; Source assignments for I2S_LCM_Config:u4|I2S_Controller:u0 ;
+----------------+-------+------+----------------------------+
; Assignment ; Value ; From ; To ;
+----------------+-------+------+----------------------------+
; POWER_UP_LEVEL ; Low ; - ; always1~ ;
+----------------+-------+------+----------------------------+
+------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: Top-level Entity: |DE2_LCM_Test ;
+----------------+-------+-----------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+-----------------------------------------------------+
; H_SYNC_CYC ; 1 ; Integer ;
; H_SYNC_BACK ; 151 ; Integer ;
; H_SYNC_ACT ; 960 ; Integer ;
; H_SYNC_FRONT ; 59 ; Integer ;
; H_SYNC_TOTAL ; 1171 ; Integer ;
; V_SYNC_CYC ; 1 ; Integer ;
; V_SYNC_BACK ; 13 ; Integer ;
; V_SYNC_ACT ; 240 ; Integer ;
; V_SYNC_FRONT ; 8 ; Integer ;
; V_SYNC_TOTAL ; 262 ; Integer ;
+----------------+-------+-----------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: LCM_PLL:u0|altpll:altpll_component ;
+-------------------------------+-------------------+-----------------------------+
; Parameter Name ; Value ; Type ;
+-------------------------------+-------------------+-----------------------------+
; OPERATION_MODE ; NORMAL ; Untyped ;
; PLL_TYPE ; FAST ; Untyped ;
; QUALIFY_CONF_DONE ; OFF ; Untyped ;
; COMPENSATE_CLOCK ; CLK0 ; Untyped ;
; SCAN_CHAIN ; LONG ; Untyped ;
; PRIMARY_CLOCK ; INCLK0 ; Untyped ;
; INCLK0_INPUT_FREQUENCY ; 20000 ; Integer ;
; INCLK1_INPUT_FREQUENCY ; 0 ; Untyped ;
; GATE_LOCK_SIGNAL ; NO ; Untyped ;
; GATE_LOCK_COUNTER ; 0 ; Untyped ;
; LOCK_HIGH ; 1 ; Untyped ;
; LOCK_LOW ; 1 ; Untyped ;
; VALID_LOCK_MULTIPLIER ; 1 ; Untyped ;
; INVALID_LOCK_MULTIPLIER ; 5 ; Untyped ;
; SWITCH_OVER_ON_LOSSCLK ; OFF ; Untyped ;
; SWITCH_OVER_ON_GATED_LOCK ; OFF ; Untyped ;
; ENABLE_SWITCH_OVER_COUNTER ; OFF ; Untyped ;
; SKIP_VCO ; OFF ; Untyped ;
; SWITCH_OVER_COUNTER ; 0 ; Untyped ;
; SWITCH_OVER_TYPE ; AUTO ; Untyped ;
; FEEDBACK_SOURCE ; EXTCLK0 ; Untyped ;
; BANDWIDTH ; 0 ; Untyped ;
; BANDWIDTH_TYPE ; AUTO ; Untyped ;
; SPREAD_FREQUENCY ; 0 ; Untyped ;
; DOWN_SPREAD ; 0 ; Untyped ;
; SELF_RESET_ON_GATED_LOSS_LOCK ; OFF ; Untyped ;
; CLK5_MULTIPLY_BY ; 1 ; Untyped ;
; CLK4_MULTIPLY_BY ; 1 ; Untyped ;
; CLK3_MULTIPLY_BY ; 1 ; Untyped ;
; CLK2_MULTIPLY_BY ; 1 ; Untyped ;
; CLK1_MULTIPLY_BY ; 1 ; Untyped ;
; CLK0_MULTIPLY_BY ; 921 ; Integer ;
; CLK5_DIVIDE_BY ; 1 ; Untyped ;
; CLK4_DIVIDE_BY ; 1 ; Untyped ;
; CLK3_DIVIDE_BY ; 1 ; Untyped ;
; CLK2_DIVIDE_BY ; 1 ; Untyped ;
; CLK1_DIVIDE_BY ; 1 ; Untyped ;
; CLK0_DIVIDE_BY ; 2500 ; Integer ;
; CLK5_PHASE_SHIFT ; 0 ; Untyped ;
; CLK4_PHASE_SHIFT ; 0 ; Untyped ;
; CLK3_PHASE_SHIFT ; 0 ; Untyped ;
; CLK2_PHASE_SHIFT ; 0 ; Untyped ;
; CLK1_PHASE_SHIFT ; 0 ; Untyped ;
; CLK0_PHASE_SHIFT ; 0 ; Untyped ;
; CLK5_TIME_DELAY ; 0 ; Untyped ;
; CLK4_TIME_DELAY ; 0 ; Untyped ;
; CLK3_TIME_DELAY ; 0 ; Untyped ;
; CLK2_TIME_DELAY ; 0 ; Untyped ;
; CLK1_TIME_DELAY ; 0 ; Untyped ;
; CLK0_TIME_DELAY ; 0 ; Untyped ;
; CLK5_DUTY_CYCLE ; 50 ; Untyped ;
; CLK4_DUTY_CYCLE ; 50 ; Untyped ;
; CLK3_DUTY_CYCLE ; 50 ; Untyped ;
; CLK2_DUTY_CYCLE ; 50 ; Untyped ;
; CLK1_DUTY_CYCLE ; 50 ; Untyped ;
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