📄 fg_ctrl.psm
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; For best accuracy we calculate 'S' using the full precision value of 'N' divided
; by Ft and then multiply continuously by 2 until we reach the biggest value less
; that 2^48. The number of multiplications by 2 indicating the value of 'y'.
;
; In this case we find that 'y' is 43.....
; S = 21474836.48 x (2^43) / 1000000 = 21.47483648 x (2^43)
; = 188894659314785.80854784
;
; ...round to nearest integer and convert to hexadecimal S = ABCC77118462
;
; N will be taken from the 80 bit product by removing the 43 LSBs and the 5 MSBs
; to leave the 32 active bits required. This is best achieved by shifting left
; by 5 places (multiply by 2^5=32) and keeping the upper 32-bits.
;
;
; Sanity check....
; Note that most calculators do not support >64 bit values to you will either
; need to decompose your calculation and perform some of it manually or trust
; the PicoBlaze implementation :-)
;
; Ft = 1MHz = 000F4240
; S = x ABCC77118462
; --------------------
; 000A3D70A3D70A405C80
;
; shift left 5 places x 20
; --------------------
; 0147AE147AE1480B9000
;
; As expected, the most significant 32-bit (4 bytes) are 0147AE14 hex which is
; the DDS control word for 1MHz calculated previously.
;
; ***
;
; Now I will consider how this needs to be modified for the circuit presented
; which has a second DCM connected to the output of the phase accumulator to
; multiply the synthesized frequency and reduce cycle to cycle jitter at
; the same time. There is then a clock divider circuit connected to the output
; of the DCM which allows lower frequencies to be formed a different way (more of
; that later). As a minimum that divider circuit will divide by 2 which ensures that
; a square wave is presented to the clocked put pin. So in this circuit the fundamental
; multiplication factor is 8 formed by a 16 times multiplication by the DCM (256/16) and
; then a divide by 2.
;
; The overall multiplication factor of this sebsequent circuit means that for final
; output from the DCM to be the desired frequency, the output from the phase accumulator
; needs to be the same number of times smaller. This is not a bad thing because the
; percentage jitter of waveforms produced by the phase accumulator is better for lower
; frequencies made from more clock cycles.
;
; So we modify the basic equation to
;
; Fout = Frequency at output of DCM
; M = Multiplying factor of DCM
;
; Fout = M x Fpa = M x clk x N / (2^p)
;
;
; By simple reorganisation of the equation we can compute 'N'
;
; N = Fout x (2^p) / (clk x M)
;
;
; In this design M=8, p=32, clk=200MHz
;
; So now consider generating a nominal maximum frequency of 100MHz which will require
; the frequency synthesized by the phase accumulator to be 12.5MHz.
;
; N = 100MHz x (2^32) / (200MHz x 8) = 268435456 = 10000000 Hex
;
; This all seems like a very convenient number but it simply reflects that 12.5MHz
; is a perfect division of the 200MHz clock and that that output from the phase
; accumulator will be formed perfectly of 16 of the 200MHz clock periods every time
; (8 Low and 8 High) with no additional jitter.
;
; So now we work out the scaling factor with the same rules as used previously that
; the scaling factor should be as large as possible within the 48-bits allocated.
;
; S = N x (2^y) / Ft with the condition that S < 2^48 but as large as possible
;
; In this case Ft = 100MHz = 055FE100 and the biggest value for S is found when using
; y=46
;
; S = 268435456 x (2^46) / 100000000 = 2.68435456 x (2^46)
; = 188894659314785.80854784
;
; round to 188894659314786 = ABCC77118462
;
; Actually this is the exact same scaling constant as previously because the
; frequency to be synthesized by the phase accumulator is 8 times smaller but the
; value of 'S' is deliberate scaled to be as large as possible. In fact, 'S' in this
; case has been scaled up by a factor of 8 to arrive at the same value. So after
; using the scaling constant to form the 80 bit product, this time we will remove
; the 46 LSBs and the 2 MSBs to leave the 32 active bits required. This is best
; achieved by shifting left by 2 places (multiply by 2^2=4) and keeping the upper
; 32-bits (last time we multiplied by 32 which was 8 times more).
;
;
; Sanity check....
;
; Ft = 100MHz = 055FE100
; S = x ABCC77118462
; --------------------
; 04000000000001242200
;
; shift left 5 places x 20
; --------------------
; 1000000000001C908800
;
; As expected, the most significant 32-bit (4 bytes) are 10000000 hex which is
; the DDS control word for 12.5MHz at the phase accumulator output calculated
; previously.
;
;
; ********
;
;
; 48-bit Scaling factor constant to generate the phase accumulator control word
; from the integer frequency value.
;
; S = AB CC 77 11 84 62
;
; Notes
;
; The 80-bit product must be shifted left 5 times and then most significant 32-bits
; used to provide DDS control word if the frequency required is to be synthesized
; directly at the output of the phase accumulator.
;
; The 80-bit product must be shifted left 2 times and then most significant 32-bits
; used to provide DDS control word if the frequency required is to be synthesized
; by the phase accumulator followed by a multiplying DCM and divider with overall
; frequency gain of 8 times.
;
CONSTANT scale_constant0, 62 ;LS byte
CONSTANT scale_constant1, 84
CONSTANT scale_constant2, 11
CONSTANT scale_constant3, 77
CONSTANT scale_constant4, CC
CONSTANT scale_constant5, AB ;MS byte
;
;
;
; ************************
;
;Constant to define a software delay of 1us. This must be adjusted to reflect the
;clock applied to KCPSM3. Every instruction executes in 2 clock cycles making the
;calculation highly predictable. The '6' in the following equation even allows for
;'CALL delay_1us' instruction in the initiating code.
;
; delay_1us_constant = (clock_rate - 6)/4 Where 'clock_rate' is in MHz
;
;Example: For a 50MHz clock the constant value is (10-6)/4 = 11 (0B Hex).
;For clock rates below 10MHz the value of 1 must be used and the operation will
;become lower than intended.
;
CONSTANT delay_1us_constant, 0B
;
;
;
;ASCII table
;
CONSTANT character_a, 61
CONSTANT character_b, 62
CONSTANT character_c, 63
CONSTANT character_d, 64
CONSTANT character_e, 65
CONSTANT character_f, 66
CONSTANT character_g, 67
CONSTANT character_h, 68
CONSTANT character_i, 69
CONSTANT character_j, 6A
CONSTANT character_k, 6B
CONSTANT character_l, 6C
CONSTANT character_m, 6D
CONSTANT character_n, 6E
CONSTANT character_o, 6F
CONSTANT character_p, 70
CONSTANT character_q, 71
CONSTANT character_r, 72
CONSTANT character_s, 73
CONSTANT character_t, 74
CONSTANT character_u, 75
CONSTANT character_v, 76
CONSTANT character_w, 77
CONSTANT character_x, 78
CONSTANT character_y, 79
CONSTANT character_z, 7A
CONSTANT character_A, 41
CONSTANT character_B, 42
CONSTANT character_C, 43
CONSTANT character_D, 44
CONSTANT character_E, 45
CONSTANT character_F, 46
CONSTANT character_G, 47
CONSTANT character_H, 48
CONSTANT character_I, 49
CONSTANT character_J, 4A
CONSTANT character_K, 4B
CONSTANT character_L, 4C
CONSTANT character_M, 4D
CONSTANT character_N, 4E
CONSTANT character_O, 4F
CONSTANT character_P, 50
CONSTANT character_Q, 51
CONSTANT character_R, 52
CONSTANT character_S, 53
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