📄 fg_ctrl.psm
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; KCPSM3 Program - Control and calculation for Frequency Generator design using the
; Spartan-3E Starter Kit.
;
; Interfaces with the rotary encoder and LCD display to enable a frequency to be set.
; Converts the BCD frequency value into a binary integer and then performs the high
; precision calculation necessary to derive the control numbers required by the high
; performance Direct Digital Synthesis (DDS) circuit implemented in hardware.
;
; LEDs are connected and used as edit mode indicators.
;
; Substantial comments are included in line with the code below and should be used
; in conjunction with the documentation provided with the complete reference design.
;
;
;
; Ken Chapman - Xilinx Ltd
;
; Version v1.00 - 13th July 2006
;
;**************************************************************************************
;Port definitions
;**************************************************************************************
;
;
;
CONSTANT LED_port, 80 ;8 simple LEDs
CONSTANT LED0, 01 ; LED 0 - bit0
CONSTANT LED1, 02 ; 1 - bit1
CONSTANT LED2, 04 ; 2 - bit2
CONSTANT LED3, 08 ; 3 - bit3
CONSTANT LED4, 10 ; 4 - bit4
CONSTANT LED5, 20 ; 5 - bit5
CONSTANT LED6, 40 ; 6 - bit6
CONSTANT LED7, 80 ; 7 - bit7
;
;
CONSTANT rotary_port, 00 ;Read status of rotary encoder
CONSTANT rotary_left, 01 ; Direction of last move Left=1 Right=0 - bit0
CONSTANT rotary_press, 02 ; Centre press contact (active High) - bit1
;
;
;LCD interface ports
;
;The master enable signal is not used by the LCD display itself
;but may be required to confirm that LCD communication is active.
;This is required on the Spartan-3E Starter Kit if the StrataFLASH
;is used because it shares the same data pins and conflicts must be avoided.
;
CONSTANT LCD_output_port, 40 ;LCD character module output data and control
CONSTANT LCD_E, 01 ; active High Enable E - bit0
CONSTANT LCD_RW, 02 ; Read=1 Write=0 RW - bit1
CONSTANT LCD_RS, 04 ; Instruction=0 Data=1 RS - bit2
CONSTANT LCD_drive, 08 ; Master enable (active High) - bit3
CONSTANT LCD_DB4, 10 ; 4-bit Data DB4 - bit4
CONSTANT LCD_DB5, 20 ; interface Data DB5 - bit5
CONSTANT LCD_DB6, 40 ; Data DB6 - bit6
CONSTANT LCD_DB7, 80 ; Data DB7 - bit7
;
;
CONSTANT LCD_input_port, 01 ;LCD character module input data
CONSTANT LCD_read_DB4, 10 ; 4-bit Data DB4 - bit4
CONSTANT LCD_read_DB5, 20 ; interface Data DB5 - bit5
CONSTANT LCD_read_DB6, 40 ; Data DB6 - bit6
CONSTANT LCD_read_DB7, 80 ; Data DB7 - bit7
;
;
;
;DDS control ports
;
;DDS control word is 32-bits
;
CONSTANT DDS_control0_port, 02 ; dds_control_word(7:0)
CONSTANT DDS_control1_port, 04 ; dds_control_word(15:8)
CONSTANT DDS_control2_port, 08 ; dds_control_word(23:16)
CONSTANT DDS_control3_port, 10 ; dds_control_word(31:24)
;
;Frequency scaling control word is 5-bits
;
CONSTANT DDS_scaling_port, 20 ; dds_scaling_word(4:0)
;
;
;**************************************************************************************
;Special Register usage
;**************************************************************************************
;
;**************************************************************************************
;Scratch Pad Memory Locations
;**************************************************************************************
;
CONSTANT rotary_status, 00 ;Status of rotary encoder
CONSTANT rotary_event, 80 ; flag set by interrupt in 'rotary_status' - bit7
;
CONSTANT ISR_preserve_s0, 01 ;Preserve s0 contents during ISR
;
CONSTANT LED_pattern, 02 ;LED pattern used in rotation mode
;
;
;BCD digits representing selected and displayed frequency
;
CONSTANT BCD_digit0, 03 ; value 1
CONSTANT BCD_digit1, 04 ; 10
CONSTANT BCD_digit2, 05 ; 100
CONSTANT BCD_digit3, 06 ; 1,000
CONSTANT BCD_digit4, 07 ; 10,000
CONSTANT BCD_digit5, 08 ; 100,000
CONSTANT BCD_digit6, 09 ; 1,000,000
CONSTANT BCD_digit7, 0A ; 10,000,000
CONSTANT BCD_digit8, 0B ; 100,000,000
;
;
;Binary integer representation of BCD value
;
CONSTANT frequency0, 0C ;LS byte
CONSTANT frequency1, 0D
CONSTANT frequency2, 0E
CONSTANT frequency3, 0F ;MS byte
;
;
;Control of frequency selection values
;
CONSTANT cursor_position, 10 ; Pointer to edit position on LCD
CONSTANT edit_digit_pointer, 11 ; BCD digit to be changed
;
;
;
;80-bit product resulting from 32-bit frequency x 48-bit scaling constant
;
CONSTANT product0, 12 ;LS byte
CONSTANT product1, 13
CONSTANT product2, 14
CONSTANT product3, 15
CONSTANT product4, 16
CONSTANT product5, 17
CONSTANT product6, 18
CONSTANT product7, 19
CONSTANT product8, 1A
CONSTANT product9, 1B ;MS byte
;
;Local copies of the DDS control word and DDS scaling word
;
CONSTANT DDS_control0, 1C ; dds_control_word(7:0)
CONSTANT DDS_control1, 1D ; dds_control_word(15:8)
CONSTANT DDS_control2, 1E ; dds_control_word(23:16)
CONSTANT DDS_control3, 1F ; dds_control_word(31:24)
CONSTANT DDS_scaling, 20 ; dds_scaling_word(4:0)
;
;**************************************************************************************
; Useful data constants
;**************************************************************************************
;
; To convert the frequency into a DDS control value a high precision scaling
; factor is used. This is a 48-bit number which converts the frequency presented
; as an 32-bit integer into the 32-bit value required by the phase accumulator
; to synthesize the desired frequency. The scaling factor is derived using the
; following method. First I will consider the scaling factor which results in the
; desired frequency being generated directly at the output of the phase accumulator
; which is suitable for low frequencies in which a few ns of jitter is acceptable.
;
; 'Fpa' is frequency generated by the MSB of the phase accumulator.
; 'p' is number of phase accumulator which in this case is 32 bits.
; 'clk' is the input clock frequency to the phase accumulator which is 200MHz.
; 'N' is the DDS control word value which is also 'p' bits (32 in this case).
;
; Frequency at MSB of phase accumulator is then
;
; Fpa = clk x N / (2^p)
;
; Note that the maximum value allowed for 'N' is (2^p)/2 which results in Fpa=clk/2.
; for 'N' greater than that value 'Fpa' would decrease in frequency (aliasing).
;
;
; By simple reorganisation of the equation we can compute 'N'
;
; N = Fpa x (2^p) / clk
;
;
; Now it is easier to approach the next step using specific example.
;
; So for a frequency of Fpa = 1MHz then
; N = 1MHz x (2^32)/200MHz = 21474836.48
;
; We must use the nearest 32-bit integer value 21474836 and this in turn
; is best viewed as the 32-bit hexadecimal value 0147AE14.
;
; In this case the value we have to work with is a 32-bit integer frequency
; value of 1 million which is 000F4240.
;
; So now we need to translate the value 000F4240 into 0147AE14. This is
; where a 48-bit scaling value is used together with a full precision multiplier
; as this ensures adequate accuracy of the final frequency.
;
; 32-bit frequency value ffffffff
; 48-bit scaling value x ssssssssssss
; --------------------
; 80-bit product nnnnnnnnnnnnnnnnnnnn
;
; The art is to organise the scaling factor into the range where the most is made of
; the 48-bit resolution available but which will result in the correct 32-bit output.
; The way this is achieved is the select an appropriate 32-bits from the available 80-bit
; product for use as 'N' and truncate 'y' least significant bits.
;
; From this we can deduce that for a target frequency 'Ft' at the input then the
; scaling value 'S' is given by
;
; S = N x (2^y) / Ft with the condition that S < 2^48 but as large as possible
;
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