trafficlight.map.summary

Verilog hdl开发的交通灯完整实例

Flow Status : Successful - Sun May 28 11:10:03 2006
Quartus II Version : 4.2 Build 157 12/07/2004 SJ Full Version
Revision Name : trafficlight
Top-level Entity Name : trafficlight
Family : Cyclone
Met timing requirements : N/A
Total logic elements : 154
Total pins : 19
Total virtual pins : 0
Total memory bits : 0
Total PLLs : 0