state2_fsm.sdc

来自「人民邮电出版社<<设计与验证verilog hdl >>」· SDC 代码 · 共 6 行

log_puts {@N|Using encoding styles selected by FSM Explorer.}
log_puts {Data created on Fri Dec 16 18:27:37 2005}

define_attribute {work.state2.verilog|i:CS[3:0]} syn_encoding {sequential}