de2_i2sound.qsf

Verilog代码

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		DE2_i2sound_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "5.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:19:12  OCTOBER 26, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 6.0
set_global_assignment -name BDF_FILE DE2_i2sound.bdf
set_global_assignment -name VERILOG_FILE CLOCK_500.v
set_global_assignment -name VERILOG_FILE i2c.v
set_global_assignment -name VERILOG_FILE keytr.v

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_G26 -to KEY0
set_location_assignment PIN_N2 -to 50MHZ
set_location_assignment PIN_AE22 -to ACK
set_location_assignment PIN_A6 -to I2C_SCLK
set_location_assignment PIN_B6 -to I2C_SDAT
set_location_assignment PIN_C5 -to AUD_ADCLRCK
set_location_assignment PIN_B5 -to AUD_ADCDAT
set_location_assignment PIN_C6 -to AUD_DACLRCK
set_location_assignment PIN_A4 -to AUD_DACDAT
set_location_assignment PIN_A5 -to AUD_XCK
set_location_assignment PIN_B4 -to AUD_BCLK

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name TOP_LEVEL_ENTITY DE2_i2sound

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP2C35F672C8
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

set_global_assignment -name FMAX_REQUIREMENT "50 MHz" -section_id 50MHZ
set_instance_assignment -name CLOCK_SETTINGS 50MHZ -to 50MHZ