📄 qiangdaqi.map.summary
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Analysis & Synthesis Status : Successful - Sat Jan 12 13:33:49 2008
Quartus II Version : 7.1 Build 156 04/30/2007 SJ Web Edition
Revision Name : qiangdaqi
Top-level Entity Name : qiangdaqi
Family : Stratix II
Logic utilization : N/A
Combinational ALUTs : 3
Dedicated logic registers : 0
Total registers : 0
Total pins : 6
Total virtual pins : 0
Total block memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0
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