dev.h
来自「U盘控制器USB97C223的固件代码,对2kPAGE NAND FLASH 有」· C头文件 代码 · 共 481 行 · 第 1/2 页
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481 行
/*============================================================================
____________________________________________________________________________
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SSSS M M CCCC Standard Microsystems Corporation
S MM MM SSSS C Austin Design Center
SSS M M M S C 11000 N. Mopac Expressway
S M M SSS C Stonelake Bldg. 6, Suite 500
SSSS M M S CCCC Austin, Texas 78759
SSSS ______________________________________________
____________________________________________________________________________
Copyright(C) 1999, Standard Microsystems Corporation
All Rights Reserved.
This program code listing is proprietary to SMSC and may not be copied,
distributed, or used without a license to do so. Such license may have
Limited or Restricted Rights. Please refer to the license for further
clarification.
____________________________________________________________________________
Notice: The program contained in this listing is a proprietary trade
secret of SMSC, Hauppauge, New York, and is copyrighted
under the United States Copyright Act of 1976 as an unpublished work,
pursuant to Section 104 and Section 408 of Title XVII of the United
States code. Unauthorized copying, adaption, distribution, use, or
display is prohibited by this law.
____________________________________________________________________________
Use, duplication, or disclosure by the Government is subject to
restrictions as set forth in subparagraph(c)(1)(ii) of the Rights
in Technical Data and Computer Software clause at DFARS 52.227-7013.
Contractor/Manufacturer is Standard Microsystems Corporation,
80 Arkay Drive, Hauppauge, New York, 1178-8847.
____________________________________________________________________________
____________________________________________________________________________
dev.h - the device manager implementarion
____________________________________________________________________________
comments tbd
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Revision History
Date Who Comment
________ ___ _____________________________________________________________
04/08/02 tbh initial version
05/09/02 cds added _dev_soft_reset() macro
06/21/02 cds added _nand_pwr_on() and _nand_pwr_off() macros
08/09/02 cds added attribute flag variables, default constants, and
our very own first usable attribute flag on the 211: attr_lo_sm_timing
to force nand chips to use the slower smart media spec compatible timing.
08/13/02 tbh moved g_dev_attr_xx to xdata
08/27/02 cds added attribute bit to force nand hd to enum as removable media always.
09/06/02 ds added references to the new variables used for the 'custom' blinking light code.
09/06/02 ds added an attribute bit to indicate the behavior of gpio5
09/07/02 tbh added the force iSerial to zero attrib bit
09/12/02 tbh moved g_post_access_blink_secs and g_blink_interval into
data space. this should prevent access to xdata during MS and SD
transfers. had to convert all strncpy's into memcpy's.
(MS hdw bug: corrupts data if xdata accessed during xfer.
same happens on SD? cannot prove or disprove yet...)
09/20/02 tbh added prototypes for dev_indicate_bus_speed, dev_turn_off_activity_indicator,
dev_gpio_power_down, dev_toggle_activity_indicator
10/01/02 ds Moved the index definitions for nvstore, to dev.h so that it could be accessed from
other files. Also added definition k_ix_secure_mem
10/07/02 ds Added k_ix_inq_pid_hdr and k_ix_inq_vid to support custom fields in the Inquiry data
10/15/02 cds - added k_sz_inq_pid_hdr and k_sz_inq_vid to denote size of the fields
- added globals g_inq_vid, g_inq_pid_hdr to hold contents to be used during inquiry
- added attribute bit 4: 1, use IMIDS/IPIDS fields, 0, default, build inq vid/pid from mfr/prd strings
10/17/02 cds - project-wide lun data & vtbl paging to reduce code space.
- removed g_active_media from _lun_data, _lun_() virtual functions
- added _lun_data_rd() and _lun_data_wr() macros to bypass lun paging
- added lun_set_active(log_lun) function to switch luns
10/30/02 ds Added a new attribute bit that specifies state of the activity-led on Suspend
12/4/02 sbs Added k_ix_lun_info index for Lun information in NVstor.
12/6/02 sbs Changed the k_ix_lun_info index from 242 to 241 to match with Update Discriptor tool
12/10/02 cds - added nand write-interleaving attribute bit definitions.
- added 2 bytes of reserved debug flags for tweaking the rom mask after release
12/12/02 cds - updated idxes of dynamic config codes.
- added kbm_rsvd_hi_is_fpga bit to rsvd bits and macro to test it
for allowing firmware to know if it's fpga or an asic it's running on.
12/13/02 cds - defined t_pwr_mode type & g_pwr_mode variable
- defined _dev_pwr_mgmt_disabled() macro that returns whether code is running on fpga or asic
- defined new reserved attribute bit:
rsvd_hi (byte 250) - bit 1: disable pwr mgmt features (affects asic only)
1 - disables low and partial power modes of the 223 and is full-powered even when not configured
0 - remains in low or partial powered mode until configured by a host.
12/16/02 cds - moved _XX_pwr_on/off to pwr.h
01/03/03 cds - added mcu-specific internal attribute defaults so that 210/211 code will default to
disabling pwr mgmt, and running off asic.
01/08/03 ds - added a new data location in eeprom to store the value of the osc freq.
03/04/03 cds - added new bit "kbm_attr_hl_sm_ignore_bad_cis" (lsw, msb, bit 0) to allow
access to SM cards which fail to find a valid CIS structure
04/02/03 svs Added kbm_attr_hl_cf_piomode_zero
04/02/03 sbs Changed the Bit position for ATA CF PIO confuigure attribute bit to 0x04
04/08/03 hm added attribute bit 6 for SD write protect logic,
1-->SD_WP==1 then write protect, 0(default)-->SD_WP==0 then write protect.
05/01/03 cds - redefined _dev_pwr_mgmt_disabled() macro to always return true (disabled)
if k_pwr_mgmt_enabled is not defined.
06/10/03 am - add attribute bit 7 to attr_lo byte of attribute field for
SD write protect switch polarity.
bit = 0 => SD_nWP is active low (default)
bit = 1 => SD_nWP is active high
06/11/03 am - bit 7 in attr_lo byte changed so it makes SD media write
protected regardless of the status of SD_nWP pin. bit 6
was already implementing polarity reversal (04/08/03)
for SD_nWP.
bit 6 bit 7 SD_nWP SD
0 0 low write protected
1 0 high writable
X 1 X write protected
07/01/03 pjc added kbm_attr_hl_bus_pwr_report and kbm_attr_hl_report_full_speed
to the eeprom attributes.
09/02/03 cl added kbm_attr_hl_gpio1_common_led to utilize GPIO1(USB97C223)
or GPIO0(USB97C210) to function as both a USB activity LED and
media presence LED.
added dev_common_media_led_on() and dev_common_media_led_off()
prototypes
============================================================================*/
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _inserted(__lun) _lun_data_wr((__lun), media, (_lun_data_rd((__lun), media)|(kbm_lun_media_present|kbm_lun_media_unknown|kbm_lun_media_changed)))
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _ejected(__lun) _lun_data_wr((__lun), media, (_lun_data_rd((__lun),media)&~(kbm_lun_media_present|kbm_lun_media_unknown|kbm_lun_media_changed)))
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _sd_ejected() \
{ trace0(0, dev, 0, "_sd_ejected()"); \
_lun_data_wr(k_lun_sd, media, (_lun_data_rd(k_lun_sd,media)&~(kbm_lun_media_present|kbm_lun_media_unknown|kbm_lun_media_changed)));\
_mcu_register_clr_bits(x_crd_ps, kbm_crd_ps_sd); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _mmc_ejected() \
{ trace0(0, dev, 0, "_mmc_ejected()"); \
_lun_data_wr(k_lun_mmc, media, (_lun_data_rd(k_lun_mmc, media)&~(kbm_lun_media_present|kbm_lun_media_unknown|kbm_lun_media_changed)));\
_mcu_register_clr_bits(x_crd_ps, kbm_crd_ps_mmc); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _sd_inserted_ejected() \
{ trace0(0, dev, 0, "_sd_inserted_ejected()"); \
_lun_data_wr(k_lun_sd, media, (_lun_data_rd(k_lun_sd, media)|(kbm_lun_media_present|kbm_lun_media_unknown|kbm_lun_media_changed)));\
_mcu_register_clr_bits(x_crd_ps, kbm_crd_ps_sd); \
_lun_data_wr(k_lun_mmc, media, (_lun_data_rd(k_lun_mmc, media)|(kbm_lun_media_present|kbm_lun_media_unknown|kbm_lun_media_changed)));\
_mcu_register_clr_bits(x_crd_ps, kbm_crd_ps_mmc); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _dev_soft_reset() \
{ \
trace0(0, dev, 0, "_dev_soft_reset()"); \
/* XBYTE[0x3F22] |= 0x01; */ \
_mcu_register_set_bits(x_util_config, 0x40); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _dev_sense_vbus() ((_mcu_register_rd(x_gpioa_in) & kbm_gpio3) ? k_true : k_false)
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _dev_is_fpga() (g_dev_rsvd_hi&kbm_rsvd_hi_is_fpga?k_true:k_false)
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#ifdef k_pwr_mgmt_enabled
#define _dev_pwr_mgmt_disabled() (g_dev_rsvd_hi&kbm_rsvd_hi_disable_pwr_mgmt?k_true:k_false)
#else
#define _dev_pwr_mgmt_disabled() (k_true)
#endif
//------------------------------------------------------------------------------
// prototypes
void dev_indicate_bus_speed(void) reentrant;
void dev_gpio_power_down(void) reentrant;
void dev_turn_off_activity_indicator(void) reentrant;
void dev_toggle_activity_indicator(void) reentrant;
uint8 dev_rd_most_recent_config(void) reentrant;
void dev_wr_most_recent_config(uint8 cfg) reentrant;
//------------------------------------------------------------------------------
// attributes
extern xdata uint8 g_dev_attr_lo;
extern xdata uint8 g_dev_attr_hl;
// extern xdata uint8 g_dev_attr_lh;
// extern xdata uint8 g_dev_attr_hi;
// lsw lsb bit 0: sm_timing
// 1 - nand flash chips will use the slower, smart media compatible r/w cycle time
// (default) 0 - nand flash chips will use the faster 50ns r/w cycle timing for chips that are capable
#define kbm_attr_lo_sm_timing 0x01
// lsw lsb bit 1: enum_hd_as_rm
// 1 - nand flash hard drives to always enumerate as removable media. */
// (default) 0 - nand flash hd's enum as removable when write protected, as fixed when not-write protected */
#define kbm_attr_lo_hd_as_rm 0x02
// lsw lsb bit 2: Behavior of gpio5
// 1 - Use the bit as a sd insert indicator
// (default) 0 - Use as a HS indicator
#define kbm_attr_lo_gpio5_as_sd_insert 0x04
// lsw lsb bit 3: Behavior of iSerial byte in device descriptor
// 1 - Always report iSerial as zero in the device descriptor
// (default) 0 - Report non-zero iSerial in device descriptor if serial number is valid
#define kbm_attr_lo_force_zero_iserial 0x08
// lsw lsb bit 4: Specifies which fields to use when building inquiry string
// 1 - Use IMIDS (offset 228, size 8) and IPIDS (offset 236, size 5) for inquiry
// (default) 0 - Build IMIDS and IPIDS from MFR (offset 94, size 60) and PRD (offset 94, size 60) by converting from UNICODE->printable ascii.
#define kbm_attr_lo_use_inq_mfr_prd_ids 0x10
// lsw lsb bit 5: Specifies state of the activity led on Suspend
// 1 - The gpio for the activity led is set to high on a suspend, irrespective of the idle state.
// (default) 0 - The gpio for the activity led is set to low on a suspend, irrespective of the idle state.
#define kbm_attr_lo_activity_led_gpio_hi_on_spd 0x20
// lsw lsb bit 6: SD_WP of MEDIA_STS register (SD card write protect) logic
// 1 - High: Write Protect, Low: No Write Protect
// (default) 0 - Low: Write Protect, High: No Write Protect
#define kbm_attr_lo_sd_wp 0x40
// lsw lsb bit 7: Polarity of SD_nWP pin
// 1 - High: treat SD_nWP as active high, i.e.,
// write protect when SD_nWP is high
// (default) 0 - Low: treat SD_nWP as active low, i.e.,
// write protect when SD_nWP is low
// -- AM
//#define kbm_attr_lo_sd_wp_polarity 0x80
// bit 6 is already doing polarity inversion. use bit 7 to make SD read only.
// lsw lsb bit 7: SD Read Only
// 1 - High: SD is read only
// (default) 0 - Low: SD write protect depends on bit 6 and state of
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