dev.h

来自「U盘控制器USB97C223的固件代码,对2kPAGE NAND FLASH 有」· C头文件 代码 · 共 481 行 · 第 1/2 页

//                      SD_nWP.
// -- AM
#define kbm_attr_lo_sd_wp_readonly 0x80

// lsw lsb bit 6: Enable/disable write interleaving  
//            1 - Disable write interleaving (for boards not wired to do it)
//  (default) 0 - Enable write interleaving 
#define kbm_attr_lo_nand_disable_write_interleave 0x40

// lsw lsb bit 7: Specifies how to detect nand-flash ready/busy  
//            1 - R/nB pin used directly.  (for boards where all r/nb pins are connected)
//  (default) 0 - Ignore R/nB pin (and use alternative GPIO scheme instead) 
#define kbm_attr_lo_nand_use_chip_busy_pin 0x80

// lsw msb bit 0: Specifies whether or not to fail media whos CIS sector is corrupt or unreadable.  
//            1 - Allow access to Smart Media cards on which no valid CIS can be found 
//  (default) 0 - Prevent access to Smart Media cards on which no valid CIS can be found
#define kbm_attr_hl_sm_ignore_bad_cis     0x01

//lsw msb bit 1; Specifies the PIO mode for Compact Flash Data Xfer 
//                  1- Set the PIO Xfer mode to mode Zero.
//                  0- Set the PIO Xfer mode to the mode supported by the Cf card.
// default to use fastest mode available.  Reads/Writes to the nand
// nvstore use PIO, not FMDU, so we'll always be able to use WriteEE to
// force nand to use Smart Media compatible timings should there be a problem.
#define kbm_attr_hl_cf_piomode_zero       0x04

// lsw msb bit 3; select how the device responds to a Get Status (223 only) 
//                1- Invert the bit so the chip reports self-powered.
//   (default)    0- Report chip default (bus-powered)
// This will allow the customer to select how the device responds to the 
// Get Status command on the 97c223. Currently, it always reports bus-powered.
// If this bit is set, firmware will clear bit 7 (BUS_PWR_EN) in the
// x_sie_conf register. The hardware will then report self-powered as a response
// to a get_status inquiry.
// If this bit is clear, or the eeprom is not present or is not valid, no
// action will be taken. The hardware will report bus-powered as a response
// to a get_status inquiry.
#define kbm_attr_hl_bus_pwr_report        0x08

// lsw msb bit 4; Specifies the version to report in the device descriptor
//                1- Report version 1.1 instead of 2.0.
//    (default)   0- Report the version stored in the device descriptor
// This allows a high speed device to report itself as a full speed device only.
// This prevents windows XP from displaying the dialog box warning message 
// about having a high speed device connected to a full speed host.
// This is for the 210 and 223 only.
#define kbm_attr_hl_report_full_speed     0x10

// lsw msb bit 5; Specifies whether GPIO1(USB97C223)/GPIO0(USB97C210) LED is 
//                common media status/activity LED or USB activity LED
//                1- LED is common media status/activity LED
//    (default)   0- LED is USB activity LED
// This allows GPIO1 or GPIO0 to act as both an activity and media status LED.
// This is for the USB97C210 and USB97C223 only.
#define kbm_attr_hl_gpio1_common_led	  0x20

#define k_attr_lo_default 0x00
#define k_attr_hl_default 0x00
#define k_attr_lh_default 0x00
#define k_attr_hi_default 0x00

//------------------------------------------------------------------------------
// reserved configuration bits for internal use only.
//------------------------------------------------------------------------------
// rsvd_lo bit 0: Disables/Enables multi-write emulation for the smart media controller
//             1 - Disable smart media multi-write emulation hardware.  sm xfers behave identically in 223 & 210
//   (default) 0 - Enable smart medias multi-write emulation hardware.  bits 1,2 and 3 determine which mode is used
#define kbm_sm_config_multi_write_disable   0x01

//------------------------------------------------------------------------------
// rsvd_lo bit 1: Specifies whether to pick a spicific multiple emulation mode or to use the default for medium/capabilities
//            1 - Use value of bits 2,3 for the write multiple mode
//  (default) 0 - Firmware detects media and capabilities and picks best write multi mode
#define kbm_sm_config_override_wr_mult_mode 0x02

//------------------------------------------------------------------------------
// rsvd_lo bits 5:4 : Code that specifies which mode to pick.  Some modes may not be available on all mcu's.  (i.e. 243 vs 223)
// (default)    0,0 - Use Normal multi-write emulation ( hw bursts, using 80-10 write cmds )
//              1,0 - High Speed 1-Page Write Cache ( allows subsequent page data to be xferred to card before previous write has completed)
//              0,1 - Reserved for future flash write options 
//              1,1 - Reserved for future flash write options
#define kbm_sm_config_wr_mult_mode          0x30
#define k_sm_config_wr_mult_mode_normal     0x00
#define k_sm_config_wr_mult_mode_rsvd1      0x10
#define k_sm_config_wr_mult_mode_hs1pg      0x20
#define k_sm_config_wr_mult_mode_rsvd2      0x30

//------------------------------------------------------------------------------
// rsvd_hi bit 0: Tells the firmware that it is running on an FPGA.
//              1 - firmware is running on an fpga
// (default)    0 - firmware is runnong on an asic
#define kbm_rsvd_hi_is_fpga                 0x01

//------------------------------------------------------------------------------
// rsvd_hi bit 1: Disables power management features (affects asic only)
//              1 - disables low and partial power modes of the 223 and is full-powered even when not configured 
// (default)    0 - remains in low or partial powered mode until configured by a host.
#define kbm_rsvd_hi_disable_pwr_mgmt        0x02

#ifdef k_mcu_97210
#define k_dev_rsvd_hi_default               (0x02)
#define k_dev_rsvd_lo_default               (0x00)
#endif

#ifdef k_mcu_97211
#define k_dev_rsvd_hi_default               (0x02)
#define k_dev_rsvd_lo_default               (0x00)
#endif

#ifdef k_mcu_97223
#define k_dev_rsvd_hi_default               (0x00)
#define k_dev_rsvd_lo_default               (0x00)
#endif

#ifdef k_mcu_97242
#define k_dev_rsvd_hi_default               (0x02)
#define k_dev_rsvd_lo_default               (0x00)
#endif

#ifdef k_mcu_97243
#define k_dev_rsvd_hi_default               (0x00)
#define k_dev_rsvd_lo_default               (0x00)
#endif

//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// nvstore parameter indexes and sizes

// usb/mass storage serial number string descriptor
#define k_ix_ser          0
#define k_sz_ser          26

// usb vid/pid
#define k_ix_vid_lo       26
#define k_ix_vid_hi       27
#define k_ix_pid_lo       28
#define k_ix_pid_hi       29

// usb language string descriptor
#define k_ix_lng          30
#define k_sz_lng          4

// usb manufacturer string descriptor
#define k_ix_mfr          34
#define k_sz_mfr          60

// usb product string descriptor
#define k_ix_prd          94
#define k_sz_prd          60

#define k_ix_attr_lo      154
#define k_ix_attr_hl      155
#define k_ix_attr_lh      156
#define k_ix_attr_hi      157

#define k_ix_password     158
#define k_sz_password     14

//Locations for the cfg dscr mods
#define k_ix_bmattrib     172
#define k_ix_maxpwr       173

//locations for the blinking media access lights
#define k_ix_blink_interval      174
#define k_ix_blinks_after_access 175

#define k_sz_lun_id       7
#define k_ix_lun0_id      176
#define k_ix_lun1_id      183
#define k_ix_lun2_id      190
#define k_ix_lun3_id      197

//vendor specific secure memory
#define k_ix_secure_mem   204

//vendor info for inquiry
#define k_ix_inq_vid      228
#define k_sz_inq_vid      8

//product info header for inquiry
#define k_ix_inq_pid_hdr  236 
#define k_sz_inq_pid_hdr  5

// 241<->251 reserved

//Save Lun information - 6 bytes starting at 241
#define k_ix_max_dyn_lun  241
#define k_ix_dyn_lun_cf   242
#define k_ix_dyn_lun_ms   243
#define k_ix_dyn_lun_sm   244
#define k_ix_dyn_lun_sd   245
#define k_ix_dyn_lun_nand 246

//Byte to store the desired mcu clock frequency
#define k_ix_mcu_clk_freq 247   //Values 00 = 1.876 Mhz; 04 = 3.75 Mhz ; 0C = 30 Mhz

// reserved bits for debug purposes
#define k_ix_dev_rsvd_hi      250
#define k_ix_dev_rsvd_lo      251

// structure signature index
#define k_ix_sig_hi       252
#define k_ix_sig_lh       253
#define k_ix_sig_hl       254
#define k_ix_sig_lo       255

// ata0 format signature
#define k_sig_ata0_hi     0x61 // 'a'
#define k_sig_ata0_lh     0x74 // 't'
#define k_sig_ata0_hl     0x61 // 'a'
#define k_sig_ata0_lo     0x30 // '0'

// ata1 format signature
#define k_sig_ata1_hi     0x61 // 'a'
#define k_sig_ata1_lh     0x74 // 't'
#define k_sig_ata1_hl     0x61 // 'a'
#define k_sig_ata1_lo     0x31 // '1'
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
extern xdata uint8 g_led_state;
extern uint8 g_blink_interval;
extern bit g_activity_led_idle_bright;
extern uint8 g_post_access_blink_secs;
extern xdata uint8 g_nvstore_post_access_blink_secs;
extern xdata uint8 g_inq_vid[k_sz_inq_vid];
extern xdata uint8 g_inq_pid_hdr[k_sz_inq_pid_hdr];
extern xdata g_dev_rsvd_hi;
extern xdata g_dev_rsvd_lo;
extern void nvstore_write_enable() reentrant;
extern void nvstore_write_disable() reentrant;
extern void nvstore_write(uint8 addr, uint8 value) reentrant;
extern uint8 nvstore_read(uint8 addr) reentrant;
extern void dev_toggle_led(void) reentrant;
extern void dev_common_media_led_on() reentrant;
extern void dev_common_media_led_off() reentrant;

//---eof------------------------------------------------------------------------