lu20040094.fit.rpt

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RPT
434
字号
Fitter report for LU20040094
Fri Apr 06 21:02:38 2007
Version 6.0 Build 178 04/27/2006 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Fitter Summary
  3. Fitter Settings
  4. Pin-Out File
  5. Fitter Resource Usage Summary
  6. Input Pins
  7. Output Pins
  8. All Package Pins
  9. Output Pin Default Load For Reported TCO
 10. Fitter Resource Utilization by Entity
 11. Non-Global High Fan-Out Signals
 12. Interconnect Usage Summary
 13. LAB External Interconnect
 14. LAB Macrocells
 15. Parallel Expander
 16. Shareable Expander
 17. Logic Cell Interconnection
 18. Fitter Device Options
 19. Fitter Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+------------------------------------------------------------------+
; Fitter Summary                                                   ;
+-----------------------+------------------------------------------+
; Fitter Status         ; Successful - Fri Apr 06 21:02:38 2007    ;
; Quartus II Version    ; 6.0 Build 178 04/27/2006 SJ Full Version ;
; Revision Name         ; LU20040094                               ;
; Top-level Entity Name ; LU20040094                               ;
; Family                ; MAX7000S                                 ;
; Device                ; EPM7128SLC84-6                           ;
; Timing Models         ; Final                                    ;
; Total macrocells      ; 70 / 128 ( 55 % )                        ;
; Total pins            ; 18 / 68 ( 26 % )                         ;
+-----------------------+------------------------------------------+


+-----------------------------------------------------------------------+
; Fitter Settings                                                       ;
+--------------------------------------------+----------+---------------+
; Option                                     ; Setting  ; Default Value ;
+--------------------------------------------+----------+---------------+
; Device                                     ; AUTO     ;               ;
; Use smart compilation                      ; Off      ; Off           ;
; Optimize IOC Register Placement for Timing ; On       ; On            ;
; Limit to One Fitting Attempt               ; Off      ; Off           ;
; Fitter Initial Placement Seed              ; 1        ; 1             ;
; Slow Slew Rate                             ; Off      ; Off           ;
; Fitter Effort                              ; Auto Fit ; Auto Fit      ;
+--------------------------------------------+----------+---------------+


+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in F:/vhdl 实验/实验一/LU20040094.pin.


+-------------------------------------------------------+
; Fitter Resource Usage Summary                         ;

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