20040094.vhd

组成原理实验作业

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.ALL;
ENTITY LU20040094 IS
	PORT(
		cin	: IN	STD_LOGIC;
		a,b	: IN	STD_LOGIC_VECTOR(3 DOWNTO 0);
		cout: OUT   STD_LOGIC;
		sum : OUT	STD_LOGIC_VECTOR(3 DOWNTO 0)
	);
END LU20040094;
ARCHITECTURE behavor OF LU20040094 IS
	SIGNAL temp3,asum,bsum    : STD_LOGIC_VECTOR(4 DOWNTO 0);
	SIGNAL temp1,temp2        : STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
    PROCESS(a,b,cin)
    VARIABLE aa,bb : INTEGER;
    VARIABLE just  : BOOLEAN;
    BEGIN
    -- translate 8421 to 5421--
       IF((a(3)OR(a(2)AND a(0))OR(a(2)AND a(1)))='1') THEN
           temp1 <= a + "0011";
       ELSE
           temp1 <= a;
       END IF;
       IF((b(3)OR(b(2)AND b(0))OR(b(2)AND b(1)))='1') THEN
           temp2 <= b + "0011";
       ELSE
           temp2 <= b;
       END IF;
     -- convert a and b to integer in order to  proofread
       aa:=CONV_INTEGER(a);
       bb:=CONV_INTEGER(b);
     -- just is boolean variable which express the proofread function
       temp3 <= ('0'&temp1)+ ('0'&temp2)+ cin;
       IF((temp3(3)OR(temp3(2)AND temp3(1))OR(temp3(2)AND temp3(0)))='1') THEN
           just :=TRUE;
       ELSE
           just :=FALSE;
       END IF;
     -- proofread --
       IF(aa<5 AND bb<5 AND NOT(just))THEN
           asum <= temp3;
       ELSIF(aa<5 AND bb<5 AND just) THEN
           asum <= temp3 + "0011";
       ELSIF(((aa>5)AND(bb<5)AND just)OR((aa<5)AND(bb>5)AND just))THEN
           asum <= temp3 + "0011";
       ELSIF((aa>5)AND(bb>5)AND just)THEN
           asum <= temp3 + "0011";
       ELSE
           asum <= temp3;
       END IF;
     -- translate 5421 to 8421 
       IF(asum(3)='1') THEN
           bsum <= asum + "11101";
       ELSE
           bsum <= asum;
       END IF;
       cout <= bsum(4);
       sum  <= bsum(3 DOWNTO 0);
    END PROCESS;
END behavor;