📄 lu20040094.rpt
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74 INPUT - LVTTL - - m0
IOVCC group F: VCCIO Current is 40 ma (Limit is 200 ma)
Pin Type Code VCCIO I/O Standard Input Ref Current Name
77 OUTPUT 3.3V LVTTL - 4 ma fn11
78 OUTPUT 3.3V LVTTL - 4 ma fn8
79 OUTPUT 3.3V LVTTL - 4 ma fn9
80 OUTPUT 3.3V LVTTL - 4 ma cn12
81 OUTPUT 3.3V LVTTL - 4 ma gn2
82 OUTPUT 3.3V LVTTL - 4 ma pn2
83 INPUT - LVTTL - - bn11
84 OUTPUT 3.3V LVTTL - 4 ma fn10
86 INPUT - LVTTL - - an0
87 INPUT - LVTTL - - an15
88 INPUT - LVTTL - - s9
91 OUTPUT 3.3V LVTTL - 4 ma pn1
92 OUTPUT 3.3V LVTTL - 4 ma fn4
93 INPUT - LVTTL - - bn0
94 OUTPUT 3.3V LVTTL - 4 ma gn1
IOVCC group G: VCCIO Current is 44 ma (Limit is 200 ma)
Pin Type Code VCCIO I/O Standard Input Ref Current Name
96 OUTPUT 3.3V LVTTL - 4 ma fn7
97 INPUT - LVTTL - - bn13
98 OUTPUT 3.3V LVTTL - 4 ma fn6
99 OUTPUT 3.3V LVTTL - 4 ma fn5
102 OUTPUT 3.3V LVTTL - 4 ma cn8
106 OUTPUT 3.3V LVTTL - 4 ma gn0
107 OUTPUT 3.3V LVTTL - 4 ma cn4
109 OUTPUT 3.3V LVTTL - 4 ma pn0
110 OUTPUT 3.3V LVTTL - 4 ma fn2
111 OUTPUT 3.3V LVTTL - 4 ma fn0
112 OUTPUT 3.3V LVTTL - 4 ma fn1
114 OUTPUT 3.3V LVTTL - 4 ma fn3
IOGND group A: GNDIO Current is 28 ma (Limit is 200 ma)
Pin Type Code VCCIO I/O Standard Input Ref Current Name
131 INPUT - LVTTL - - s2
132 INPUT - LVTTL - - s1
133 INPUT - LVTTL - - s0
134 INPUT - LVTTL - - bn9
106 OUTPUT - LVTTL - 4 ma gn0
107 OUTPUT - LVTTL - 4 ma cn4
109 OUTPUT - LVTTL - 4 ma pn0
110 OUTPUT - LVTTL - 4 ma fn2
111 OUTPUT - LVTTL - 4 ma fn0
112 OUTPUT - LVTTL - 4 ma fn1
114 OUTPUT - LVTTL - 4 ma fn3
IOGND group B: GNDIO Current is 0 ma (Limit is 200 ma)
Pin Type Code VCCIO I/O Standard Input Ref Current Name
136 INPUT - LVTTL - - bn5
137 INPUT - LVTTL - - bn12
138 INPUT - LVTTL - - bn1
139 INPUT - LVTTL - - an12
140 INPUT - LVTTL - - s12
141 INPUT - LVTTL - - s15
142 INPUT - LVTTL - - s14
143 INPUT - LVTTL - - s13
5 INPUT - LVTTL - - s3
6 INPUT - LVTTL - - s4
7 INPUT - LVTTL - - bn10
8 INPUT - LVTTL - - s5
9 INPUT - LVTTL - - s6
10 INPUT - LVTTL - - s7
11 INPUT - LVTTL - - s11
IOGND group C: GNDIO Current is 12 ma (Limit is 200 ma)
Pin Type Code VCCIO I/O Standard Input Ref Current Name
14 INPUT - LVTTL - - an5
15 INPUT - LVTTL - - s10
16 INPUT - LVTTL - - s8
18 INPUT - LVTTL - - an1
21 INPUT - LVTTL - - m1
22 INPUT - LVTTL - - m2
23 INPUT - LVTTL - - m3
25 INPUT - LVTTL - - bn8
26 INPUT - LVTTL - - ci
27 INPUT - LVTTL - - bn15
28 INPUT - LVTTL - - an9
29 INPUT - LVTTL - - bn14
30 OUTPUT - LVTTL - 4 ma aeqb1
31 OUTPUT - LVTTL - 4 ma aeqb2
32 OUTPUT - LVTTL - 4 ma aeqb3
IOGND group D: GNDIO Current is 20 ma (Limit is 200 ma)
Pin Type Code VCCIO I/O Standard Input Ref Current Name
37 INPUT - LVTTL - - an3
38 INPUT - LVTTL - - an4
39 INPUT - LVTTL - - an10
40 INPUT - LVTTL - - an6
41 INPUT - LVTTL - - an11
42 INPUT - LVTTL - - bn2
44 INPUT - LVTTL - - an7
45 INPUT - LVTTL - - bn3
53 INPUT - LVTTL - - an8
54 INPUT - LVTTL - - bn7
55 INPUT - LVTTL - - bn4
56 OUTPUT - LVTTL - 4 ma aeqb0
60 OUTPUT - LVTTL - 4 ma fn13
61 OUTPUT - LVTTL - 4 ma pn3
62 OUTPUT - LVTTL - 4 ma fn12
63 OUTPUT - LVTTL - 4 ma fn14
IOGND group E: GNDIO Current is 40 ma (Limit is 200 ma)
Pin Type Code VCCIO I/O Standard Input Ref Current Name
65 OUTPUT - LVTTL - 4 ma cn16
67 OUTPUT - LVTTL - 4 ma fn15
68 INPUT - LVTTL - - an14
69 INPUT - LVTTL - - an13
70 INPUT - LVTTL - - bn6
71 OUTPUT - LVTTL - 4 ma gn3
72 INPUT - LVTTL - - an2
74 INPUT - LVTTL - - m0
77 OUTPUT - LVTTL - 4 ma fn11
78 OUTPUT - LVTTL - 4 ma fn8
79 OUTPUT - LVTTL - 4 ma fn9
80 OUTPUT - LVTTL - 4 ma cn12
81 OUTPUT - LVTTL - 4 ma gn2
82 OUTPUT - LVTTL - 4 ma pn2
83 INPUT - LVTTL - - bn11
84 OUTPUT - LVTTL - 4 ma fn10
IOGND group F: GNDIO Current is 28 ma (Limit is 200 ma)
Pin Type Code VCCIO I/O Standard Input Ref Current Name
86 INPUT - LVTTL - - an0
87 INPUT - LVTTL - - an15
88 INPUT - LVTTL - - s9
91 OUTPUT - LVTTL - 4 ma pn1
92 OUTPUT - LVTTL - 4 ma fn4
93 INPUT - LVTTL - - bn0
94 OUTPUT - LVTTL - 4 ma gn1
96 OUTPUT - LVTTL - 4 ma fn7
97 INPUT - LVTTL - - bn13
98 OUTPUT - LVTTL - 4 ma fn6
99 OUTPUT - LVTTL - 4 ma fn5
102 OUTPUT - LVTTL - 4 ma cn8
Code:
/ = Slow slew-rate output
z = Pull-Up Resistor
b = Bus-Hold
Device-Specific Information: e:\max plus\lu20040094.rpt
lu20040094
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'B':
Logic cells placed in LAB 'B'
+- LC22 |74181:adderx4|:38
|
| Other LABs fed by signals
| that feed LAB 'B'
LC | | A B C D E F G H | Logic cells that feed LAB 'B':
Pin
139 -> * | - * - * - - - - | <-- an12
137 -> * | - * - * - - - - | <-- bn12
142 -> * | - * - - * - - - | <-- s14
141 -> * | - * - - * - - - | <-- s15
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information: e:\max plus\lu20040094.rpt
lu20040094
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'C':
Logic cells placed in LAB 'C'
+----- LC36 aeqb1
| +--- LC35 aeqb2
| | +- LC33 aeqb3
| | |
| | | Other LABs fed by signals
| | | that feed LAB 'C'
LC | | | | A B C D E F G H | Logic cells that feed LAB 'C':
Pin
LC99 -> * - - | - - * - - - - - | <-- fn4
LC107-> * - - | - - * - - - - - | <-- fn5
LC105-> * - - | - - * - - - - - | <-- fn6
LC102-> * - - | - - * - - - - - | <-- fn7
LC83 -> - * - | - - * - - - - - | <-- fn8
LC84 -> - * - | - - * - - - - - | <-- fn9
LC91 -> - * - | - - * - - - - - | <-- fn10
LC81 -> - * - | - - * - - - - - | <-- fn11
LC68 -> - - * | - - * - - - - - | <-- fn12
LC65 -> - - * | - - * - - - - - | <-- fn13
LC69 -> - - * | - - * - - - - - | <-- fn14
LC72 -> - - * | - - * - - - - - | <-- fn15
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information: e:\max plus\lu20040094.rpt
lu20040094
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'D':
Logic cells placed in LAB 'D'
+--------------------- LC49 aeqb0
| +------------------- LC55 |74181:adderx1|:37
| | +----------------- LC50 |74181:adderx1|:38
| | | +--------------- LC60 |74181:adderx1|:39
| | | | +------------- LC57 |74181:adderx2|:37
| | | | | +----------- LC61 |74181:adderx2|:38
| | | | | | +--------- LC63 |74181:adderx2|:39
| | | | | | | +------- LC56 |74181:adderx3|:37
| | | | | | | | +----- LC54 |74181:adderx3|:38
| | | | | | | | | +--- LC53 |74181:adderx3|:39
| | | | | | | | | | +- LC52 |74181:adderx4|:37
| | | | | | | | | | |
| | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | that feed LAB 'D'
LC | | | | | | | | | | | | A B C D E F G H | Logic cells that feed LAB 'D':
Pin
86 -> - * * - - - - - - - - | - - - * - - - - | <-- an0
18 -> - - - * - - - - - - - | - - - * - - - * | <-- an1
38 -> - - - - * * - - - - - | - - - * - - - - | <-- an4
14 -> - - - - - - * - - - - | - - - * - - * - | <-- an5
53 -> - - - - - - - * * - - | - - - * - - - - | <-- an8
28 -> - - - - - - - - - * - | - - - * - * - - | <-- an9
139 -> - - - - - - - - - - * | - * - * - - - - | <-- an12
93 -> - * * - - - - - - - - | - - - * - - - - | <-- bn0
138 -> - - - * - - - - - - - | - - - * - - - * | <-- bn1
55 -> - - - - * * - - - - - | - - - * - - - - | <-- bn4
136 -> - - - - - - * - - - - | - - - * - - * - | <-- bn5
25 -> - - - - - - - * * - - | - - - * - - - - | <-- bn8
134 -> - - - - - - - - - * - | - - - * - * - - | <-- bn9
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