vga.map.eqn

用1K30DE FPGA写的程序

--G1_q[4] is lpm_counter:cc_rtl_0|alt_counter_f10ke:wysi_counter|q[4]
--operation mode is up_dn_cntr

G1_q[4]_lut_out = G1_q[4] $ G1L9;
G1_q[4] = DFFEA(G1_q[4]_lut_out, G2_q[2], , , , , );


--G1_q[3] is lpm_counter:cc_rtl_0|alt_counter_f10ke:wysi_counter|q[3]
--operation mode is up_dn_cntr

G1_q[3]_lut_out = G1_q[3] $ G1L7;
G1_q[3] = DFFEA(G1_q[3]_lut_out, G2_q[2], , , , , );

--G1L9 is lpm_counter:cc_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT
--operation mode is up_dn_cntr

G1L9 = CARRY(G1_q[3] & G1L7);


--A1L92 is LessThan~35
--operation mode is normal

A1L92 = G1_q[4] & G1_q[3];


--ll[8] is ll[8]
--operation mode is normal

ll[8]_lut_out = D1_unreg_res_node[8] & (A1L74 # !ll[0] # !A1L03);
ll[8] = DFFEA(ll[8]_lut_out, !G1_q[4], , , , , );


--ll[7] is ll[7]
--operation mode is normal

ll[7]_lut_out = F3_cs_buffer[7] & (A1L74 # !ll[0] # !A1L03);
ll[7] = DFFEA(ll[7]_lut_out, !G1_q[4], , , , , );


--ll[6] is ll[6]
--operation mode is normal

ll[6]_lut_out = F3_cs_buffer[6] & (A1L74 # !ll[0] # !A1L03);
ll[6] = DFFEA(ll[6]_lut_out, !G1_q[4], , , , , );


--ll[5] is ll[5]
--operation mode is normal

ll[5]_lut_out = F3_cs_buffer[5] & (A1L74 # !ll[0] # !A1L03);
ll[5] = DFFEA(ll[5]_lut_out, !G1_q[4], , , , , );


--A1L03 is LessThan~772
--operation mode is normal

A1L03 = ll[8] & ll[7] & ll[6] & ll[5];


--G1_q[2] is lpm_counter:cc_rtl_0|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is up_dn_cntr

G1_q[2]_lut_out = G1_q[2] $ G1L5;
G1_q[2] = DFFEA(G1_q[2]_lut_out, G2_q[2], , , , , );

--G1L7 is lpm_counter:cc_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT
--operation mode is up_dn_cntr

G1L7 = CARRY(G1_q[2] & G1L5);


--G1_q[1] is lpm_counter:cc_rtl_0|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is up_dn_cntr

G1_q[1]_lut_out = G1_q[1] $ G1L3;
G1_q[1] = DFFEA(G1_q[1]_lut_out, G2_q[2], , , , , );

--G1L5 is lpm_counter:cc_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is up_dn_cntr

G1L5 = CARRY(G1_q[1] & G1L3);


--A1L02 is grbx[2]~570
--operation mode is normal

A1L02 = G1_q[2] & !G1_q[4] & (G1_q[3] # !G1_q[1]) # !G1_q[2] & !G1_q[3] & (!G1_q[4] # !G1_q[1]);


--mmd[0] is mmd[0]
--operation mode is normal

mmd[0]_lut_out = !mmd[0] & !mmd[1];
mmd[0] = DFFEA(mmd[0]_lut_out, !md, , , , , );


--mmd[1] is mmd[1]
--operation mode is normal

mmd[1]_lut_out = !mmd[1] & mmd[0];
mmd[1] = DFFEA(mmd[1]_lut_out, !md, , , , , );


--A1L9 is grbp[2]~749
--operation mode is normal

A1L9 = mmd[0] & !A1L51 # !mmd[0] & (mmd[1] & !A1L51 # !mmd[1] & A1L02);


--grb[2] is grb[2]
--operation mode is normal

grb[2] = !A1L92 & !A1L03 & (md $ A1L9);


--A1L13 is LessThan~773
--operation mode is normal

A1L13 = ll[6] & ll[5];


--ll[4] is ll[4]
--operation mode is normal

ll[4]_lut_out = F3_cs_buffer[4];
ll[4] = DFFEA(ll[4]_lut_out, !G1_q[4], , , , , );


--A1L72 is grby[3]~815
--operation mode is normal

A1L72 = !ll[8] & (!ll[4] # !A1L13 # !ll[7]);


--A1L12 is grbx[3]~571
--operation mode is normal

A1L12 = !G1_q[4] & (!G1_q[2] # !G1_q[3]);


--A1L61 is grbp[3]~750
--operation mode is normal

A1L61 = A1L72 & (mmd[1] $ (A1L12 # mmd[0])) # !A1L72 & A1L12 & !mmd[0];


--grb[3] is grb[3]
--operation mode is normal

grb[3] = !A1L92 & !A1L03 & (md $ A1L61);


--ll[3] is ll[3]
--operation mode is normal

ll[3]_lut_out = F3_cs_buffer[3];
ll[3] = DFFEA(ll[3]_lut_out, !G1_q[4], , , , , );


--A1L22 is grby[1]~816
--operation mode is normal

A1L22 = ll[3] & (ll[8] & !ll[7] # !ll[8] & ll[4]) # !ll[3] & ll[4] & (ll[8] $ ll[7]);


--ll[2] is ll[2]
--operation mode is normal

ll[2]_lut_out = F3_cs_buffer[2];
ll[2] = DFFEA(ll[2]_lut_out, !G1_q[4], , , , , );


--A1L32 is grby[1]~817
--operation mode is normal

A1L32 = ll[3] & !ll[2] & !ll[7] # !ll[3] & (!ll[7] # !ll[2]);


--A1L42 is grby[1]~818
--operation mode is normal

A1L42 = A1L32 & (!ll[4] # !ll[8]) # !A1L32 & !ll[8] & !ll[4] # !ll[5];


--A1L52 is grby[1]~819
--operation mode is normal

A1L52 = ll[6] & A1L22 & ll[5] # !ll[6] & A1L42;


--G1_q[0] is lpm_counter:cc_rtl_0|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is up_dn_cntr

G1_q[0]_lut_out = !G1_q[0];
G1_q[0] = DFFEA(G1_q[0]_lut_out, G2_q[2], , , , , );

--G1L3 is lpm_counter:cc_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is up_dn_cntr

G1L3 = CARRY(G1_q[0]);


--A1L8 is grbp[1]~751
--operation mode is normal

A1L8 = A1L52 & (mmd[1] $ (A1L71 # mmd[0])) # !A1L52 & A1L71 & !mmd[0];


--grb[1] is grb[1]
--operation mode is normal

grb[1] = !A1L92 & !A1L03 & (md $ A1L8);


--G2_q[2] is lpm_counter:fs_rtl_1|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is up_dn_cntr

G2_q[2]_lut_out = G2_q[2] $ G2L5;
G2_q[2] = DFFEA(G2_q[2]_lut_out, clk, , , , , );


--ll[1] is ll[1]
--operation mode is normal

ll[1]_lut_out = F3_cs_buffer[1] & (A1L74 # !ll[0] # !A1L03);
ll[1] = DFFEA(ll[1]_lut_out, !G1_q[4], , , , , );


--A1L74 is reduce_nor~53
--operation mode is normal

A1L74 = ll[4] # ll[3] # ll[2] # ll[1];


--ll[0] is ll[0]
--operation mode is arithmetic

ll[0]_lut_out = !ll[0];
ll[0] = DFFEA(ll[0]_lut_out, !G1_q[4], , , , , );

--F3_cout[0] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic

F3_cout[0] = CARRY(ll[0]);


--F3_cs_buffer[7] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]
--operation mode is arithmetic

F3_cs_buffer[7] = ll[7] $ F3_cout[6];

--F3_cout[7] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[7]
--operation mode is arithmetic

F3_cout[7] = CARRY(ll[7] & F3_cout[6]);


--F3_cs_buffer[6] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]
--operation mode is arithmetic

F3_cs_buffer[6] = ll[6] $ F3_cout[5];

--F3_cout[6] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[6]
--operation mode is arithmetic

F3_cout[6] = CARRY(ll[6] & F3_cout[5]);


--F3_cs_buffer[5] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

F3_cs_buffer[5] = ll[5] $ F3_cout[4];

--F3_cout[5] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

F3_cout[5] = CARRY(ll[5] & F3_cout[4]);


--F3_cs_buffer[4] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

F3_cs_buffer[4] = ll[4] $ F3_cout[3];

--F3_cout[4] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

F3_cout[4] = CARRY(ll[4] & F3_cout[3]);


--F3_cs_buffer[3] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

F3_cs_buffer[3] = ll[3] $ F3_cout[2];

--F3_cout[3] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

F3_cout[3] = CARRY(ll[3] & F3_cout[2]);


--F3_cs_buffer[2] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

F3_cs_buffer[2] = ll[2] $ F3_cout[1];

--F3_cout[2] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

F3_cout[2] = CARRY(ll[2] & F3_cout[1]);


--G2_q[1] is lpm_counter:fs_rtl_1|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is up_dn_cntr

G2_q[1]_lut_out = G2_q[1] $ G2L3;
G2_q[1] = DFFEA(G2_q[1]_lut_out, clk, , , , , );

--G2L5 is lpm_counter:fs_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is up_dn_cntr

G2L5 = CARRY(G2_q[1] & G2L3);


--D1_unreg_res_node[8] is lpm_add_sub:add_rtl_2|addcore:adder|unreg_res_node[8]
--operation mode is normal

D1_unreg_res_node[8] = F3_cout[7] $ ll[8];


--F3_cs_buffer[1] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

F3_cs_buffer[1] = ll[1] $ F3_cout[0];

--F3_cout[1] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

F3_cout[1] = CARRY(ll[1] & F3_cout[0]);


--A1L01 is grbp[2]~754
--operation mode is normal

A1L01 = ll[8] & (ll[4] # ll[3]) # !ll[8] & ll[4] & ll[3] & !ll[7];


--A1L11 is grbp[2]~755
--operation mode is normal

A1L11 = A1L01 & (ll[7] # A1L13) # !A1L01 & ll[7] & (!ll[4] # !A1L13);


--A1L21 is grbp[2]~756
--operation mode is normal

A1L21 = mmd[0] # !mmd[1] # !A1L02 # !A1L11;


--A1L62 is grby[1]~820
--operation mode is normal

A1L62 = ll[4] & !ll[8];


--A1L31 is grbp[2]~757
--operation mode is normal

A1L31 = ll[3] & !ll[8] & !ll[4] # !ll[3] & (!ll[4] # !ll[8]);


--A1L41 is grbp[2]~758
--operation mode is normal

A1L41 = ll[7] & A1L62 & A1L13 # !ll[7] & (A1L31 # !A1L13);


--A1L51 is grbp[2]~760
--operation mode is normal

A1L51 = (mmd[1] & (A1L02 # mmd[0]) # !mmd[1] & !mmd[0] # !A1L41) & CASCADE(A1L21);


--G2_q[0] is lpm_counter:fs_rtl_1|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is up_dn_cntr

G2_q[0]_lut_out = !G2_q[0];
G2_q[0] = DFFEA(G2_q[0]_lut_out, clk, , , , , );

--G2L3 is lpm_counter:fs_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is up_dn_cntr

G2L3 = CARRY(G2_q[0]);


--A1L81 is grbx[1]~568
--operation mode is normal

A1L81 = G1_q[2] & (G1_q[4] $ (G1_q[3] # G1_q[1])) # !G1_q[2] & (G1_q[1] & !G1_q[3] # !G1_q[1] & !G1_q[4]);


--A1L91 is grbx[1]~569
--operation mode is normal

A1L91 = G1_q[2] & !G1_q[4] & (G1_q[3] $ G1_q[1]) # !G1_q[2] & !G1_q[3] & (G1_q[1] $ !G1_q[4]);


--A1L71 is grbx[1]~567
--operation mode is normal

A1L71 = A1L81 & (A1L91 # !G1_q[0]) # !A1L81 & A1L91 & G1_q[0];


--md is md
--operation mode is input

md = INPUT();


--clk is clk
--operation mode is input

clk = INPUT();


--hs is hs
--operation mode is output

hs = OUTPUT(!A1L92);


--vs is vs
--operation mode is output

vs = OUTPUT(!A1L03);


--r is r
--operation mode is output

r = OUTPUT(grb[2]);


--g is g
--operation mode is output

g = OUTPUT(grb[3]);


--b is b
--operation mode is output

b = OUTPUT(grb[1]);