📄 vga.rpt
字号:
- 1 - D 28 DFFE 0 4 0 7 ll3 (:35)
- 3 - D 28 DFFE 0 4 0 6 ll2 (:36)
- 7 - D 28 DFFE 0 3 0 4 ll1 (:37)
- 6 - D 28 DFFE 0 1 0 5 ll0 (:38)
- 2 - B 16 OR2 0 4 0 1 :233
- 3 - B 16 OR2 0 4 0 1 :245
- 1 - B 16 OR2 0 4 0 1 :257
- 2 - D 28 OR2 ! 0 4 0 8 :578
- 8 - B 10 OR2 ! 0 2 1 3 :826
- 6 - D 23 OR2 ! 0 3 1 4 :873
- 2 - B 18 AND2 0 4 0 3 :1100
- 3 - B 10 OR2 ! 0 4 0 3 :1127
- 4 - B 04 OR2 0 4 0 2 :1154
- 6 - B 04 OR2 ! 0 3 0 1 :1181
- 4 - B 10 OR2 ! 0 4 0 2 :1233
- 6 - B 18 AND2 0 2 0 2 :1272
- 6 - B 16 OR2 0 3 0 1 :1375
- 1 - B 04 OR2 s ! 0 4 0 2 ~1398~1
- 3 - B 04 OR2 0 4 0 1 :1399
- 5 - B 04 OR2 s 0 4 0 1 ~1423~1
- 8 - B 04 OR2 s 0 4 0 1 ~1423~2
- 2 - B 04 OR2 0 4 0 1 :1423
- 7 - D 24 OR2 s ! 0 2 0 3 ~1437~1
- 4 - D 24 AND2 0 3 0 1 :1437
- 6 - D 24 OR2 0 4 0 2 :1450
- 5 - D 24 OR2 ! 0 4 0 2 :1488
- 3 - D 24 OR2 0 4 0 2 :1539
- 8 - D 24 OR2 0 4 0 1 :1552
- 1 - D 23 OR2 ! 0 4 0 2 :1590
- 2 - D 24 OR2 s ! 0 2 0 4 ~1593~1
- 1 - D 27 OR2 0 4 0 2 :1639
- 2 - D 27 OR2 0 4 0 1 :1654
- 2 - D 23 OR2 ! 0 4 0 2 :1692
- 5 - D 22 OR2 0 4 0 1 :1746
- 4 - D 28 OR2 ! 0 3 0 2 :1758
- 1 - D 24 OR2 s 0 4 0 2 ~1876~1
- 3 - D 23 OR2 0 2 0 1 :1876
- 8 - D 23 OR2 s ! 0 2 0 2 ~1899~1
- 5 - D 23 OR2 0 4 0 1 :1900
- 4 - D 23 OR2 0 4 0 1 :1920
- 7 - D 23 OR2 0 4 0 1 :1924
- 1 - B 10 OR2 1 3 1 0 :1966
- 6 - B 10 OR2 1 3 1 0 :1976
- 2 - B 10 OR2 1 3 1 0 :1986
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
p = Packed register
Device-Specific Information: e:\jheda1k30\vga\vga.rpt
vga
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 1/144( 0%) 1/ 72( 1%) 0/ 72( 0%) 0/16( 0%) 2/16( 12%) 0/16( 0%)
B: 8/144( 5%) 16/ 72( 22%) 0/ 72( 0%) 0/16( 0%) 2/16( 12%) 0/16( 0%)
C: 0/144( 0%) 1/ 72( 1%) 0/ 72( 0%) 0/16( 0%) 1/16( 6%) 0/16( 0%)
D: 12/144( 8%) 0/ 72( 0%) 12/ 72( 16%) 1/16( 6%) 0/16( 0%) 0/16( 0%)
E: 0/144( 0%) 0/ 72( 0%) 0/ 72( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
F: 0/144( 0%) 0/ 72( 0%) 0/ 72( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 4/24( 16%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
25: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
26: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
27: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
28: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
29: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
30: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
31: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
32: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
33: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
34: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
35: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
36: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: e:\jheda1k30\vga\vga.rpt
vga
** CLOCK SIGNALS **
Type Fan-out Name
DFF 18 cc4
DFF 6 fs2
INPUT 5 md
INPUT 3 clk
Device-Specific Information: e:\jheda1k30\vga\vga.rpt
vga
** EQUATIONS **
clk : INPUT;
md : INPUT;
-- Node name is 'b'
-- Equation name is 'b', type is output
b = _LC2_B10;
-- Node name is ':28' = 'cc0'
-- Equation name is 'cc0', location is LC8_B18, type is buried.
cc0 = DFFE(!cc0, fs2, VCC, VCC, VCC);
-- Node name is ':27' = 'cc1'
-- Equation name is 'cc1', location is LC4_B18, type is buried.
cc1 = DFFE( _EQ001, fs2, VCC, VCC, VCC);
_EQ001 = cc0 & !cc1
# !cc0 & cc1;
-- Node name is ':26' = 'cc2'
-- Equation name is 'cc2', location is LC5_B18, type is buried.
cc2 = DFFE( _EQ002, fs2, VCC, VCC, VCC);
_EQ002 = cc2 & !_LC3_B18
# !cc2 & _LC3_B18;
-- Node name is ':25' = 'cc3'
-- Equation name is 'cc3', location is LC7_B18, type is buried.
cc3 = DFFE( _EQ003, fs2, VCC, VCC, VCC);
_EQ003 = !cc2 & cc3
# cc3 & !_LC3_B18
# cc2 & !cc3 & _LC3_B18;
-- Node name is ':24' = 'cc4'
-- Equation name is 'cc4', location is LC1_B18, type is buried.
cc4 = DFFE( _EQ004, fs2, VCC, VCC, VCC);
_EQ004 = !cc3 & cc4
# !cc2 & cc4
# cc4 & !_LC3_B18
# cc2 & cc3 & !cc4 & _LC3_B18;
-- Node name is ':22' = 'fs0'
-- Equation name is 'fs0', location is LC3_B17, type is buried.
fs0 = DFFE(!fs0, GLOBAL( clk), VCC, VCC, VCC);
-- Node name is ':21' = 'fs1'
-- Equation name is 'fs1', location is LC2_B17, type is buried.
fs1 = DFFE( _EQ005, GLOBAL( clk), VCC, VCC, VCC);
_EQ005 = !fs0 & fs1
# fs0 & !fs1;
-- Node name is ':20' = 'fs2'
-- Equation name is 'fs2', location is LC1_B17, type is buried.
fs2 = DFFE( _EQ006, GLOBAL( clk), VCC, VCC, VCC);
_EQ006 = !fs1 & fs2
# !fs0 & fs2
# fs0 & fs1 & !fs2;
-- Node name is 'g'
-- Equation name is 'g', type is output
g = _LC6_B10;
-- Node name is 'hs'
-- Equation name is 'hs', type is output
hs = !_LC8_B10;
-- Node name is ':38' = 'll0'
-- Equation name is 'll0', location is LC6_D28, type is buried.
ll0 = DFFE(!ll0, !cc4, VCC, VCC, VCC);
-- Node name is ':37' = 'll1'
-- Equation name is 'll1', location is LC7_D28, type is buried.
ll1 = DFFE( _EQ007, !cc4, VCC, VCC, VCC);
_EQ007 = !_LC2_D28 & ll0 & !ll1
# !_LC2_D28 & !ll0 & ll1;
-- Node name is ':36' = 'll2'
-- Equation name is 'll2', location is LC3_D28, type is buried.
ll2 = DFFE( _EQ008, !cc4, VCC, VCC, VCC);
_EQ008 = !_LC2_D28 & !ll0 & ll2
# !_LC2_D28 & !ll1 & ll2
# !_LC2_D28 & ll0 & ll1 & !ll2;
-- Node name is ':35' = 'll3'
-- Equation name is 'll3', location is LC1_D28, type is buried.
ll3 = DFFE( _EQ009, !cc4, VCC, VCC, VCC);
_EQ009 = !_LC2_D28 & !_LC5_D28 & ll3
# !_LC2_D28 & !ll2 & ll3
# !_LC2_D28 & _LC5_D28 & ll2 & !ll3;
-- Node name is ':34' = 'll4'
-- Equation name is 'll4', location is LC7_D22, type is buried.
ll4 = DFFE( _EQ010, !cc4, VCC, VCC, VCC);
_EQ010 = !_LC2_D28 & !_LC8_D28 & ll4
# !_LC2_D28 & _LC8_D28 & !ll4;
-- Node name is ':33' = 'll5'
-- Equation name is 'll5', location is LC2_D22, type is buried.
ll5 = DFFE( _EQ011, !cc4, VCC, VCC, VCC);
_EQ011 = !_LC2_D28 & !ll4 & ll5
# !_LC2_D28 & !_LC8_D28 & ll5
# !_LC2_D28 & _LC8_D28 & ll4 & !ll5;
-- Node name is ':32' = 'll6'
-- Equation name is 'll6', location is LC1_D22, type is buried.
ll6 = DFFE( _EQ012, !cc4, VCC, VCC, VCC);
_EQ012 = !_LC2_D28 & !ll5 & ll6
# !_LC2_D28 & !_LC6_D22 & ll6
# !_LC2_D28 & _LC6_D22 & ll5 & !ll6;
-- Node name is ':31' = 'll7'
-- Equation name is 'll7', location is LC4_D22, type is buried.
ll7 = DFFE( _EQ013, !cc4, VCC, VCC, VCC);
_EQ013 = !_LC2_D28 & !_LC8_D22 & ll7
# !_LC2_D28 & _LC8_D22 & !ll7;
-- Node name is ':30' = 'll8'
-- Equation name is 'll8', location is LC3_D22, type is buried.
ll8 = DFFE( _EQ014, !cc4, VCC, VCC, VCC);
_EQ014 = !_LC2_D28 & !ll7 & ll8
# !_LC2_D28 & !_LC8_D22 & ll8
# !_LC2_D28 & _LC8_D22 & ll7 & !ll8;
-- Node name is ':9' = 'mmd0'
-- Equation name is 'mmd0', location is LC4_B16, type is buried.
mmd0 = DFFE( _EQ015, !md, VCC, VCC, VCC);
_EQ015 = !mmd0 & !mmd1;
-- Node name is ':8' = 'mmd1'
-- Equation name is 'mmd1', location is LC5_B16, type is buried.
mmd1 = DFFE( _EQ016, !md, VCC, VCC, VCC);
_EQ016 = mmd0 & !mmd1;
-- Node name is 'r'
-- Equation name is 'r', type is output
r = _LC1_B10;
-- Node name is 'vs'
-- Equation name is 'vs', type is output
vs = !_LC6_D23;
-- Node name is '|LPM_ADD_SUB:443|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC3_B18', type is buried
_LC3_B18 = LCELL( _EQ017);
_EQ017 = cc0 & cc1;
-- Node name is '|LPM_ADD_SUB:443|addcore:adder|:67' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC7_B4', type is buried
!_LC7_B4 = _LC7_B4~NOT;
_LC7_B4~NOT = LCELL( _EQ018);
_EQ018 = !cc2
# !_LC3_B18
# !cc3;
-- Node name is '|LPM_ADD_SUB:633|addcore:adder|:75' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC5_D28', type is buried
_LC5_D28 = LCELL( _EQ019);
_EQ019 = ll0 & ll1;
-- Node name is '|LPM_ADD_SUB:633|addcore:adder|:83' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_D28', type is buried
_LC8_D28 = LCELL( _EQ020);
_EQ020 = ll0 & ll1 & ll2 & ll3;
-- Node name is '|LPM_ADD_SUB:633|addcore:adder|:87' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_D22', type is buried
_LC6_D22 = LCELL( _EQ021);
_EQ021 = _LC8_D28 & ll4;
-- Node name is '|LPM_ADD_SUB:633|addcore:adder|:95' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_D22', type is buried
_LC8_D22 = LCELL( _EQ022);
_EQ022 = _LC8_D28 & ll4 & ll5 & ll6;
-- Node name is ':233'
-- Equation name is '_LC2_B16', type is buried
_LC2_B16 = LCELL( _EQ023);
_EQ023 = _LC3_D23 & !_LC6_B16 & !mmd0 & mmd1
# !_LC3_D23 & _LC6_B16 & !mmd0
# _LC3_D23 & mmd0 & !mmd1
# _LC6_B16 & !mmd0 & !mmd1;
-- Node name is ':245'
-- Equation name is '_LC3_B16', type is buried
_LC3_B16 = LCELL( _EQ024);
_EQ024 = _LC5_D23 & mmd0 & !mmd1
# !_LC3_B4 & _LC5_D23 & !mmd0 & mmd1
# _LC3_B4 & !_LC5_D23 & !mmd0
# _LC3_B4 & !mmd0 & !mmd1;
-- Node name is ':257'
-- Equation name is '_LC1_B16', type is buried
_LC1_B16 = LCELL( _EQ025);
_EQ025 = _LC2_B4 & !mmd0 & !mmd1
# _LC7_D23 & mmd0 & !mmd1
# _LC2_B4 & !_LC7_D23 & !mmd0
# !_LC2_B4 & _LC7_D23 & !mmd0 & mmd1;
-- Node name is ':578'
-- Equation name is '_LC2_D28', type is buried
!_LC2_D28 = _LC2_D28~NOT;
_LC2_D28~NOT = LCELL( _EQ026);
_EQ026 = !_LC6_D23
# !ll0
# ll1
# !_LC4_D28;
-- Node name is ':826'
-- Equation name is '_LC8_B10', type is buried
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -