vga.map.summary

来自「用1K30DE FPGA写的程序」· SUMMARY 代码 · 共 12 行

Flow Status : Successful - Tue Dec 14 00:35:26 2004
Quartus II Version : 4.1 Build 181 06/29/2004 SJ Full Version
Revision Name : VGA
Top-level Entity Name : vga
Family : ACEX1K
Device : EP1K30TC144-3
Timing Models : Production
Total logic elements : 54
Total pins : 7
Total memory bits : 0
Total PLLs : 0