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📄 seg47.tan.qmsg

📁 一个数码管显示的测试程序
💻 QMSG
📖 第 1 页 / 共 3 页
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{ "Info" "ITDB_FULL_TCO_RESULT" "clk seg7\[3\] addcont:inst3\|time\[7\] 17.698 ns register " "Info: tco from clock \"clk\" to destination pin \"seg7\[3\]\" through register \"addcont:inst3\|time\[7\]\" is 17.698 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 7.904 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 7.904 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_28 30 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 30; CLK Node = 'clk'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "seg47" "UNKNOWN" "V1" "F:/mywork/seg47/db/seg47.quartus_db" { Floorplan "F:/mywork/seg47/" "" "" { clk } "NODE_NAME" } "" } } { "seg47.bdf" "" { Schematic "F:/mywork/seg47/seg47.bdf" { { -80 16 184 -64 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.723 ns) + CELL(0.935 ns) 3.127 ns lpm_counter0:inst5\|lpm_counter:lpm_counter_component\|cntr_6gd:auto_generated\|safe_q\[28\] 2 REG LC_X8_Y8_N8 11 " "Info: 2: + IC(0.723 ns) + CELL(0.935 ns) = 3.127 ns; Loc. = LC_X8_Y8_N8; Fanout = 11; REG Node = 'lpm_counter0:inst5\|lpm_counter:lpm_counter_component\|cntr_6gd:auto_generated\|safe_q\[28\]'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "seg47" "UNKNOWN" "V1" "F:/mywork/seg47/db/seg47.quartus_db" { Floorplan "F:/mywork/seg47/" "" "1.658 ns" { clk lpm_counter0:inst5|lpm_counter:lpm_counter_component|cntr_6gd:auto_generated|safe_q[28] } "NODE_NAME" } "" } } { "db/cntr_6gd.tdf" "" { Text "F:/mywork/seg47/db/cntr_6gd.tdf" 274 8 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.066 ns) + CELL(0.711 ns) 7.904 ns addcont:inst3\|time\[7\] 3 REG LC_X20_Y17_N7 2 " "Info: 3: + IC(4.066 ns) + CELL(0.711 ns) = 7.904 ns; Loc. = LC_X20_Y17_N7; Fanout = 2; REG Node = 'addcont:inst3\|time\[7\]'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "seg47" "UNKNOWN" "V1" "F:/mywork/seg47/db/seg47.quartus_db" { Floorplan "F:/mywork/seg47/" "" "4.777 ns" { lpm_counter0:inst5|lpm_counter:lpm_counter_component|cntr_6gd:auto_generated|safe_q[28] addcont:inst3|time[7] } "NODE_NAME" } "" } } { "addcont.vhd" "" { Text "F:/mywork/seg47/addcont.vhd" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns ( 39.41 % ) " "Info: Total cell delay = 3.115 ns ( 39.41 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.789 ns ( 60.59 % ) " "Info: Total interconnect delay = 4.789 ns ( 60.59 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "seg47" "UNKNOWN" "V1" "F:/mywork/seg47/db/seg47.quartus_db" { Floorplan "F:/mywork/seg47/" "" "7.904 ns" { clk lpm_counter0:inst5|lpm_counter:lpm_counter_component|cntr_6gd:auto_generated|safe_q[28] addcont:inst3|time[7] } "NODE_NAME" } "" } } { "d:/quartus2/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus2/bin/Technology_Viewer.qrui" "7.904 ns" { clk clk~out0 lpm_counter0:inst5|lpm_counter:lpm_counter_component|cntr_6gd:auto_generated|safe_q[28] addcont:inst3|time[7] } { 0.000ns 0.000ns 0.723ns 4.066ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "addcont.vhd" "" { Text "F:/mywork/seg47/addcont.vhd" 17 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.570 ns + Longest register pin " "Info: + Longest register to pin delay is 9.570 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns addcont:inst3\|time\[7\] 1 REG LC_X20_Y17_N7 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X20_Y17_N7; Fanout = 2; REG Node = 'addcont:inst3\|time\[7\]'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "seg47" "UNKNOWN" "V1" "F:/mywork/seg47/db/seg47.quartus_db" { Floorplan "F:/mywork/seg47/" "" "" { addcont:inst3|time[7] } "NODE_NAME" } "" } } { "addcont.vhd" "" { Text "F:/mywork/seg47/addcont.vhd" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.250 ns) + CELL(0.114 ns) 1.364 ns segmain:inst\|dataout\[3\]~76 2 COMB LC_X21_Y18_N9 1 " "Info: 2: + IC(1.250 ns) + CELL(0.114 ns) = 1.364 ns; Loc. = LC_X21_Y18_N9; Fanout = 1; COMB Node = 'segmain:inst\|dataout\[3\]~76'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "seg47" "UNKNOWN" "V1" "F:/mywork/seg47/db/seg47.quartus_db" { Floorplan "F:/mywork/seg47/" "" "1.364 ns" { addcont:inst3|time[7] segmain:inst|dataout[3]~76 } "NODE_NAME" } "" } } { "segmain.vhd" "" { Text "F:/mywork/seg47/segmain.vhd" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.228 ns) + CELL(0.442 ns) 3.034 ns segmain:inst\|dataout\[3\]~77 3 COMB LC_X21_Y17_N1 7 " "Info: 3: + IC(1.228 ns) + CELL(0.442 ns) = 3.034 ns; Loc. = LC_X21_Y17_N1; Fanout = 7; COMB Node = 'segmain:inst\|dataout\[3\]~77'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "seg47" "UNKNOWN" "V1" "F:/mywork/seg47/db/seg47.quartus_db" { Floorplan "F:/mywork/seg47/" "" "1.670 ns" { segmain:inst|dataout[3]~76 segmain:inst|dataout[3]~77 } "NODE_NAME" } "" } } { "segmain.vhd" "" { Text "F:/mywork/seg47/segmain.vhd" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.334 ns) + CELL(0.590 ns) 5.958 ns bin27seg:inst1\|data_out\[3\]~106 4 COMB LC_X34_Y18_N6 1 " "Info: 4: + IC(2.334 ns) + CELL(0.590 ns) = 5.958 ns; Loc. = LC_X34_Y18_N6; Fanout = 1; COMB Node = 'bin27seg:inst1\|data_out\[3\]~106'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "seg47" "UNKNOWN" "V1" "F:/mywork/seg47/db/seg47.quartus_db" { Floorplan "F:/mywork/seg47/" "" "2.924 ns" { segmain:inst|dataout[3]~77 bin27seg:inst1|data_out[3]~106 } "NODE_NAME" } "" } } { "bin27seg.vhd" "" { Text "F:/mywork/seg47/bin27seg.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.488 ns) + CELL(2.124 ns) 9.570 ns seg7\[3\] 5 PIN PIN_178 0 " "Info: 5: + IC(1.488 ns) + CELL(2.124 ns) = 9.570 ns; Loc. = PIN_178; Fanout = 0; PIN Node = 'seg7\[3\]'" {  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "seg47" "UNKNOWN" "V1" "F:/mywork/seg47/db/seg47.quartus_db" { Floorplan "F:/mywork/seg47/" "" "3.612 ns" { bin27seg:inst1|data_out[3]~106 seg7[3] } "NODE_NAME" } "" } } { "seg47.bdf" "" { Schematic "F:/mywork/seg47/seg47.bdf" { { 256 632 808 272 "seg7\[6..0\]" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.270 ns ( 34.17 % ) " "Info: Total cell delay = 3.270 ns ( 34.17 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.300 ns ( 65.83 % ) " "Info: Total interconnect delay = 6.300 ns ( 65.83 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "seg47" "UNKNOWN" "V1" "F:/mywork/seg47/db/seg47.quartus_db" { Floorplan "F:/mywork/seg47/" "" "9.570 ns" { addcont:inst3|time[7] segmain:inst|dataout[3]~76 segmain:inst|dataout[3]~77 bin27seg:inst1|data_out[3]~106 seg7[3] } "NODE_NAME" } "" } } { "d:/quartus2/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus2/bin/Technology_Viewer.qrui" "9.570 ns" { addcont:inst3|time[7] segmain:inst|dataout[3]~76 segmain:inst|dataout[3]~77 bin27seg:inst1|data_out[3]~106 seg7[3] } { 0.000ns 1.250ns 1.228ns 2.334ns 1.488ns } { 0.000ns 0.114ns 0.442ns 0.590ns 2.124ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "seg47" "UNKNOWN" "V1" "F:/mywork/seg47/db/seg47.quartus_db" { Floorplan "F:/mywork/seg47/" "" "7.904 ns" { clk lpm_counter0:inst5|lpm_counter:lpm_counter_component|cntr_6gd:auto_generated|safe_q[28] addcont:inst3|time[7] } "NODE_NAME" } "" } } { "d:/quartus2/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus2/bin/Technology_Viewer.qrui" "7.904 ns" { clk clk~out0 lpm_counter0:inst5|lpm_counter:lpm_counter_component|cntr_6gd:auto_generated|safe_q[28] addcont:inst3|time[7] } { 0.000ns 0.000ns 0.723ns 4.066ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } } { "d:/quartus2/bin/Report_Window_01.qrpt" "" { Report "d:/quartus2/bin/Report_Window_01.qrpt" "Compiler" "seg47" "UNKNOWN" "V1" "F:/mywork/seg47/db/seg47.quartus_db" { Floorplan "F:/mywork/seg47/" "" "9.570 ns" { addcont:inst3|time[7] segmain:inst|dataout[3]~76 segmain:inst|dataout[3]~77 bin27seg:inst1|data_out[3]~106 seg7[3] } "NODE_NAME" } "" } } { "d:/quartus2/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus2/bin/Technology_Viewer.qrui" "9.570 ns" { addcont:inst3|time[7] segmain:inst|dataout[3]~76 segmain:inst|dataout[3]~77 bin27seg:inst1|data_out[3]~106 seg7[3] } { 0.000ns 1.250ns 1.228ns 2.334ns 1.488ns } { 0.000ns 0.114ns 0.442ns 0.590ns 2.124ns } } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 2 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Mar 13 14:50:57 2008 " "Info: Processing ended: Thu Mar 13 14:50:57 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}

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