seg47.map.qmsg

一个数码管显示的测试程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.1 Build 176 10/26/2005 SJ Full Version " "Info: Version 5.1 Build 176 10/26/2005 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Mar 13 14:50:35 2008 " "Info: Processing started: Thu Mar 13 14:50:35 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off seg47 -c seg47 " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off seg47 -c seg47" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "segmain.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file segmain.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 segmain-behav " "Info: Found design unit 1: segmain-behav" {  } { { "segmain.vhd" "" { Text "F:/mywork/seg47/segmain.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 segmain " "Info: Found entity 1: segmain" {  } { { "segmain.vhd" "" { Text "F:/mywork/seg47/segmain.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "seg47.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file seg47.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 seg47 " "Info: Found entity 1: seg47" {  } { { "seg47.bdf" "" { Schematic "F:/mywork/seg47/seg47.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Warning" "WSGN_FILE_IS_MISSING" "F:/mywork/seg47/seg472.vhd " "Warning: Can't analyze file -- file F:/mywork/seg47/seg472.vhd is missing" {  } {  } 0 0 "Can't analyze file -- file %1!s! is missing" 0 0}
{ "Warning" "WSGN_FILE_IS_MISSING" "F:/mywork/seg47/Vhdl3.vhd " "Warning: Can't analyze file -- file F:/mywork/seg47/Vhdl3.vhd is missing" {  } {  } 0 0 "Can't analyze file -- file %1!s! is missing" 0 0}
{ "Warning" "WSGN_FILE_IS_MISSING" "F:/mywork/seg47/addcount.vhd " "Warning: Can't analyze file -- file F:/mywork/seg47/addcount.vhd is missing" {  } {  } 0 0 "Can't analyze file -- file %1!s! is missing" 0 0}
{ "Warning" "WSGN_FILE_IS_MISSING" "F:/mywork/seg47/subcount.vhd " "Warning: Can't analyze file -- file F:/mywork/seg47/subcount.vhd is missing" {  } {  } 0 0 "Can't analyze file -- file %1!s! is missing" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "addcont.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file addcont.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 addcont-behav " "Info: Found design unit 1: addcont-behav" {  } { { "addcont.vhd" "" { Text "F:/mywork/seg47/addcont.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 addcont " "Info: Found entity 1: addcont" {  } { { "addcont.vhd" "" { Text "F:/mywork/seg47/addcont.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "subcont.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file subcont.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 subcont-behav " "Info: Found design unit 1: subcont-behav" {  } { { "subcont.vhd" "" { Text "F:/mywork/seg47/subcont.vhd" 11 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 subcont " "Info: Found entity 1: subcont" {  } { { "subcont.vhd" "" { Text "F:/mywork/seg47/subcont.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "bin27seg.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file bin27seg.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 bin27seg-bin27seg_arch " "Info: Found design unit 1: bin27seg-bin27seg_arch" {  } { { "bin27seg.vhd" "" { Text "F:/mywork/seg47/bin27seg.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 bin27seg " "Info: Found entity 1: bin27seg" {  } { { "bin27seg.vhd" "" { Text "F:/mywork/seg47/bin27seg.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "seg47 " "Info: Elaborating entity \"seg47\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "segmain segmain:inst " "Info: Elaborating entity \"segmain\" for hierarchy \"segmain:inst\"" {  } { { "seg47.bdf" "inst" { Schematic "F:/mywork/seg47/seg47.bdf" { { 80 160 336 176 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "datain segmain.vhd(41) " "Warning (10492): VHDL Process Statement warning at segmain.vhd(41): signal \"datain\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "segmain.vhd" "" { Text "F:/mywork/seg47/segmain.vhd" 41 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "datain segmain.vhd(42) " "Warning (10492): VHDL Process Statement warning at segmain.vhd(42): signal \"datain\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "segmain.vhd" "" { Text "F:/mywork/seg47/segmain.vhd" 42 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "datain segmain.vhd(43) " "Warning (10492): VHDL Process Statement warning at segmain.vhd(43): signal \"datain\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "segmain.vhd" "" { Text "F:/mywork/seg47/segmain.vhd" 43 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "datain segmain.vhd(44) " "Warning (10492): VHDL Process Statement warning at segmain.vhd(44): signal \"datain\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "segmain.vhd" "" { Text "F:/mywork/seg47/segmain.vhd" 44 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "lpm_counter0.tdf 1 1 " "Warning: Using design file lpm_counter0.tdf, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter0 " "Info: Found entity 1: lpm_counter0" {  } { { "lpm_counter0.tdf" "" { Text "F:/mywork/seg47/lpm_counter0.tdf" 36 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_counter0 lpm_counter0:inst5 " "Info: Elaborating entity \"lpm_counter0\" for hierarchy \"lpm_counter0:inst5\"" {  } { { "seg47.bdf" "inst5" { Schematic "F:/mywork/seg47/seg47.bdf" { { -112 200 344 -48 "inst5" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quartus2/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/quartus2/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "lpm_counter.tdf" "" { Text "d:/quartus2/libraries/megafunctions/lpm_counter.tdf" 233 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_counter lpm_counter0:inst5\|lpm_counter:lpm_counter_component " "Info: Elaborating entity \"lpm_counter\" for hierarchy \"lpm_counter0:inst5\|lpm_counter:lpm_counter_component\"" {  } { { "lpm_counter0.tdf" "lpm_counter_component" { Text "F:/mywork/seg47/lpm_counter0.tdf" 44 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_6gd.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_6gd.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_6gd " "Info: Found entity 1: cntr_6gd" {  } { { "db/cntr_6gd.tdf" "" { Text "F:/mywork/seg47/db/cntr_6gd.tdf" 25 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cntr_6gd lpm_counter0:inst5\|lpm_counter:lpm_counter_component\|cntr_6gd:auto_generated " "Info: Elaborating entity \"cntr_6gd\" for hierarchy \"lpm_counter0:inst5\|lpm_counter:lpm_counter_component\|cntr_6gd:auto_generated\"" {  } { { "lpm_counter.tdf" "auto_generated" { Text "d:/quartus2/libraries/megafunctions/lpm_counter.tdf" 257 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "subcont subcont:inst4 " "Info: Elaborating entity \"subcont\" for hierarchy \"subcont:inst4\"" {  } { { "seg47.bdf" "inst4" { Schematic "F:/mywork/seg47/seg47.bdf" { { -32 104 216 64 "inst4" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "addcont addcont:inst3 " "Info: Elaborating entity \"addcont\" for hierarchy \"addcont:inst3\"" {  } { { "seg47.bdf" "inst3" { Schematic "F:/mywork/seg47/seg47.bdf" { { -40 344 456 56 "inst3" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "bin27seg bin27seg:inst1 " "Info: Elaborating entity \"bin27seg\" for hierarchy \"bin27seg:inst1\"" {  } { { "seg47.bdf" "inst1" { Schematic "F:/mywork/seg47/seg47.bdf" { { 80 400 584 176 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "IVRFX_VHDL_CASE_STATEMENT_OTHERS_CLAUSE_NEVER_SELECTED" "bin27seg.vhd(30) " "Info (10425): VHDL Case Statement information at bin27seg.vhd(30): OTHERS choice is never selected" {  } { { "bin27seg.vhd" "" { Text "F:/mywork/seg47/bin27seg.vhd" 30 0 0 } }  } 0 10425 "VHDL Case Statement information at %1!s!: OTHERS choice is never selected" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "80 " "Info: Implemented 80 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "11 " "Info: Implemented 11 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "67 " "Info: Implemented 67 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 9 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 9 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Mar 13 14:50:39 2008 " "Info: Processing ended: Thu Mar 13 14:50:39 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Info: Elapsed time: 00:00:05" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}