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📄 video_segmentation.rpt

📁 酒吧灯光控制工程在FPGA中的实现源代码.rar 觉得有用就下,也可作为例子学习
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   -      1     -    B    20       DFFE   +            2    2    0    6  PIXEL_COUNTER0 (:133)
   -      4     -    A    20       DFFE   +            0    3    1    4  ADDRESS_COUNTER_L8 (:135)
   -      6     -    A    20       DFFE   +            0    3    1    5  ADDRESS_COUNTER_L7 (:136)
   -      8     -    A    20       DFFE   +            0    3    1    6  ADDRESS_COUNTER_L6 (:137)
   -      3     -    A    17       DFFE   +            0    3    1    8  ADDRESS_COUNTER_L5 (:138)
   -      2     -    A    14       DFFE   +            0    3    1    5  ADDRESS_COUNTER_L4 (:139)
   -      8     -    A    14       DFFE   +            0    3    1    6  ADDRESS_COUNTER_L3 (:140)
   -      2     -    A    17       DFFE   +    !       0    3    1    2  ADDRESS_COUNTER_L2 (:141)
   -      1     -    A    17       DFFE   +            0    3    1    2  ADDRESS_COUNTER_L1 (:142)
   -      7     -    A    17       DFFE   +            0    3    1    3  ADDRESS_COUNTER_L0 (:143)
   -      2     -    A    21       DFFE   +            0    3    1    0  ADDRESS_COUNTER_H3 (:144)
   -      3     -    A    21       DFFE   +            0    3    1    1  ADDRESS_COUNTER_H2 (:145)
   -      6     -    A    21       DFFE   +            0    2    1    2  ADDRESS_COUNTER_H1 (:146)
   -      1     -    A    21       DFFE   +            0    2    1    3  ADDRESS_COUNTER_H0 (:147)
   -      4     -    B    16        OR2    s           0    4    0    1  ~1073~1
   -      3     -    B    17        OR2    s           0    4    0    2  ~1073~2
   -      1     -    B    17        OR2        !       0    2    0    5  :1073
   -      4     -    B    20       AND2    s           0    2    0    5  ~1474~1
   -      5     -    B    16        OR2                0    4    0    1  :1474
   -      7     -    B    16        OR2                0    3    0    1  :1480
   -      1     -    B    16        OR2                0    4    0    1  :1486
   -      2     -    B    20        OR2                0    4    0    1  :1492
   -      6     -    B    17        OR2                0    3    0    1  :1498
   -      7     -    B    20        OR2                0    4    0    1  :1504
   -      5     -    B    20        OR2                0    4    0    1  :1510
   -      5     -    B    17       AND2    s   !       1    3    0    2  ~1550~1
   -      3     -    A    13        OR2    s           0    4    0    1  ~1789~1
   -      2     -    A    13        OR2        !       0    4    0    8  :1789
   -      6     -    A    13       AND2                0    4    0    5  :1808
   -      4     -    A    13       AND2    s   !       0    4    0    2  ~1827~1
   -      8     -    A    13        OR2        !       0    4    0    4  :1827
   -      7     -    A    13        OR2    s           0    3    0    1  ~1846~1
   -      1     -    A    13        OR2        !       0    4    0    6  :1846
   -      3     -    A    20        OR2                0    4    0    1  :2028
   -      1     -    A    20        OR2                0    4    0    1  :2043
   -      6     -    A    17        OR2                0    4    0    1  :2061
   -      6     -    A    14       AND2    s   !       0    3    0    2  ~2079~1
   -      7     -    A    14        OR2                0    4    0    1  :2079
   -      1     -    A    14        OR2                0    3    0    1  :2093
   -      3     -    A    14        OR2                0    3    0    1  :2094
   -      5     -    A    17        OR2    s           0    4    0    1  ~2112~1
   -      4     -    A    14       AND2    s           0    4    0    3  ~2228~1
   -      5     -    A    20       AND2    s           0    2    0    2  ~2228~2
   -      8     -    A    17       AND2    s           0    3    0    1  ~2228~3
   -      4     -    A    21       AND2    s   !       0    2    0    3  ~2281~1
   -      1     -    B    19       AND2    s           0    3    0    1  ~2753~1
   -      3     -    B    18       AND2    s           0    4    0    1  ~2753~2
   -      2     -    B    19       AND2                0    4    0   21  :2753
   -      2     -    B    07        OR2    s   !       0    4    0    1  ~2776~1
   -      2     -    B    10        OR2    s   !       0    3    0    1  ~2776~2
   -      1     -    B    09        OR2        !       0    4    0   23  :2776
   -      7     -    C    08        OR2    s           0    4    0    1  ~2865~1
   -      4     -    B    09        OR2    s           0    3    0    1  ~2865~2
   -      8     -    C    08        OR2    s           0    4    0    1  ~2865~3
   -      1     -    C    08        OR2        !       0    4    0   14  :2865
   -      4     -    A    06        OR2        !       1    1    1    0  :2882


Code:

s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
p = Packed register


Device-Specific Information:                  d:\cotrol\video_segmentation.rpt
video_segmentation

** FASTTRACK INTERCONNECT UTILIZATION **

Row FastTrack Interconnect:

          Global         Left Half-      Right Half-
         FastTrack       FastTrack       FastTrack 
Row     Interconnect    Interconnect    Interconnect    Input Pins     Output Pins     Bidir Pins
A:      18/ 96( 18%)     4/ 48(  8%)     8/ 48( 16%)    1/16(  6%)     11/16( 68%)     0/16(  0%)
B:      23/ 96( 23%)     6/ 48( 12%)     5/ 48( 10%)    4/16( 25%)      7/16( 43%)     0/16(  0%)
C:      12/ 96( 12%)     6/ 48( 12%)     5/ 48( 10%)    5/16( 31%)      6/16( 37%)     0/16(  0%)


Column FastTrack Interconnect:

         FastTrack                                 
Column  Interconnect    Input Pins     Output Pins     Bidir Pins
01:      0/24(  0%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
02:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
03:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
04:      2/24(  8%)     0/4(  0%)      2/4( 50%)       0/4(  0%)
05:      2/24(  8%)     1/4( 25%)      1/4( 25%)       0/4(  0%)
06:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
07:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
08:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
09:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
10:      3/24( 12%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
11:      2/24(  8%)     1/4( 25%)      1/4( 25%)       0/4(  0%)
12:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
13:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
14:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
15:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
16:      2/24(  8%)     0/4(  0%)      2/4( 50%)       0/4(  0%)
17:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
18:      2/24(  8%)     1/4( 25%)      2/4( 50%)       0/4(  0%)
19:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
20:      2/24(  8%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
21:      2/24(  8%)     0/4(  0%)      2/4( 50%)       0/4(  0%)
22:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
23:      2/24(  8%)     1/4( 25%)      1/4( 25%)       0/4(  0%)
24:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
EA:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)


Device-Specific Information:                  d:\cotrol\video_segmentation.rpt
video_segmentation

** CLOCK SIGNALS **

Type     Fan-out       Name
INPUT       58         DCLK
INPUT       40         HS


Device-Specific Information:                  d:\cotrol\video_segmentation.rpt
video_segmentation

** CLEAR SIGNALS **

Type     Fan-out       Name
INPUT       40         HS
INPUT       33         VS


Device-Specific Information:                  d:\cotrol\video_segmentation.rpt
video_segmentation

** EQUATIONS **

BLUE0    : INPUT;
BLUE1    : INPUT;
BLUE2    : INPUT;
BLUE3    : INPUT;
BLUE4    : INPUT;
BLUE5    : INPUT;
BLUE6    : INPUT;
BLUE7    : INPUT;
DCLK     : INPUT;
DE       : INPUT;
GREEN0   : INPUT;
GREEN1   : INPUT;
GREEN2   : INPUT;
GREEN3   : INPUT;
GREEN4   : INPUT;
GREEN5   : INPUT;
GREEN6   : INPUT;
GREEN7   : INPUT;
HS       : INPUT;
RED0     : INPUT;
RED1     : INPUT;
RED2     : INPUT;
RED3     : INPUT;
RED4     : INPUT;
RED5     : INPUT;
RED6     : INPUT;
RED7     : INPUT;
VS       : INPUT;

-- Node name is ':147' = 'ADDRESS_COUNTER_H0' 
-- Equation name is 'ADDRESS_COUNTER_H0', location is LC1_A21, type is buried.
ADDRESS_COUNTER_H0 = DFFE( _EQ001, GLOBAL( DCLK), GLOBAL( VS),  VCC,  VCC);
  _EQ001 =  ADDRESS_COUNTER_H0 & !_LC1_C8
         # !ADDRESS_COUNTER_H0 &  _LC1_C8 &  _LC2_A13
         #  ADDRESS_COUNTER_H0 & !_LC2_A13;

-- Node name is ':146' = 'ADDRESS_COUNTER_H1' 
-- Equation name is 'ADDRESS_COUNTER_H1', location is LC6_A21, type is buried.
ADDRESS_COUNTER_H1 = DFFE( _EQ002, GLOBAL( DCLK), GLOBAL( VS),  VCC,  VCC);
  _EQ002 =  ADDRESS_COUNTER_H1 &  _LC4_A21
         # !ADDRESS_COUNTER_H0 &  ADDRESS_COUNTER_H1
         #  ADDRESS_COUNTER_H0 & !ADDRESS_COUNTER_H1 & !_LC4_A21;

-- Node name is ':145' = 'ADDRESS_COUNTER_H2' 
-- Equation name is 'ADDRESS_COUNTER_H2', location is LC3_A21, type is buried.
ADDRESS_COUNTER_H2 = DFFE( _EQ003, GLOBAL( DCLK), GLOBAL( VS),  VCC,  VCC);
  _EQ003 = !ADDRESS_COUNTER_H1 &  ADDRESS_COUNTER_H2
         # !ADDRESS_COUNTER_H0 &  ADDRESS_COUNTER_H2
         #  ADDRESS_COUNTER_H2 &  _LC4_A21
         #  ADDRESS_COUNTER_H0 &  ADDRESS_COUNTER_H1 & !ADDRESS_COUNTER_H2 & 
             !_LC4_A21;

-- Node name is ':144' = 'ADDRESS_COUNTER_H3' 
-- Equation name is 'ADDRESS_COUNTER_H3', location is LC2_A21, type is buried.
ADDRESS_COUNTER_H3 = DFFE( _EQ004, GLOBAL( DCLK), GLOBAL( VS),  VCC,  VCC);
  _EQ004 =  ADDRESS_COUNTER_H3 & !_LC5_A21
         # !ADDRESS_COUNTER_H2 &  ADDRESS_COUNTER_H3
         #  ADDRESS_COUNTER_H3 &  _LC4_A21
         #  ADDRESS_COUNTER_H2 & !ADDRESS_COUNTER_H3 & !_LC4_A21 &  _LC5_A21;

-- Node name is ':143' = 'ADDRESS_COUNTER_L0' 
-- Equation name is 'ADDRESS_COUNTER_L0', location is LC7_A17, type is buried.
ADDRESS_COUNTER_L0 = DFFE( _EQ005, GLOBAL( DCLK), GLOBAL( VS),  VCC,  VCC);
  _EQ005 = !ADDRESS_COUNTER_L0 &  _LC1_C8 & !_LC2_A13
         #  _LC1_C8 & !_LC2_A13 &  _LC6_A13
         #  ADDRESS_COUNTER_L0 & !_LC1_C8;

-- Node name is ':142' = 'ADDRESS_COUNTER_L1' 
-- Equation name is 'ADDRESS_COUNTER_L1', location is LC1_A17, type is buried.
ADDRESS_COUNTER_L1 = DFFE( _EQ006, GLOBAL( DCLK), GLOBAL( VS),  VCC,  VCC);
  _EQ006 = !ADDRESS_COUNTER_L0 &  ADDRESS_COUNTER_L1 &  _LC5_A20
         #  ADDRESS_COUNTER_L0 & !ADDRESS_COUNTER_L1 &  _LC5_A20
         #  ADDRESS_COUNTER_L1 & !_LC1_C8;

-- Node name is ':141' = 'ADDRESS_COUNTER_L2' 
-- Equation name is 'ADDRESS_COUNTER_L2', location is LC2_A17, type is buried.
!ADDRESS_COUNTER_L2 = ADDRESS_COUNTER_L2~NOT;
ADDRESS_COUNTER_L2~NOT = DFFE( _EQ007, GLOBAL( DCLK), GLOBAL( VS),  VCC,  VCC);
  _EQ007 = !ADDRESS_COUNTER_L2 &  _LC5_A17 & !_LC6_A14
         # !ADDRESS_COUNTER_L2 & !_LC1_C8
         #  _LC1_C8 &  _LC5_A17 & !_LC6_A14;

-- Node name is ':140' = 'ADDRESS_COUNTER_L3' 
-- Equation name is 'ADDRESS_COUNTER_L3', location is LC8_A14, type is buried.
ADDRESS_COUNTER_L3 = DFFE( _EQ008, GLOBAL( DCLK), GLOBAL( VS),  VCC,  VCC);
  _EQ008 =  _LC1_C8 & !_LC2_A13 &  _LC3_A14
         #  ADDRESS_COUNTER_L3 & !_LC1_C8;

-- Node name is ':139' = 'ADDRESS_COUNTER_L4' 
-- Equation name is 'ADDRESS_COUNTER_L4', location is LC2_A14, type is buried.
ADDRESS_COUNTER_L4 = DFFE( _EQ009, GLOBAL( DCLK), GLOBAL( VS),  VCC,  VCC);
  _EQ009 =  _LC1_C8 & !_LC2_A13 &  _LC7_A14
         #  ADDRESS_COUNTER_L4 & !_LC1_C8;

-- Node name is ':138' = 'ADDRESS_COUNTER_L5' 
-- Equation name is 'ADDRESS_COUNTER_L5', location is LC3_A17, type is buried.
ADDRESS_COUNTER_L5 = DFFE( _EQ010, GLOBAL( DCLK), GLOBAL( VS),  VCC,  VCC);
  _EQ010 =  _LC6_A17 &  _LC8_A17
         #  ADDRESS_COUNTER_L5 & !_LC1_C8;

-- Node name is ':137' = 'ADDRESS_COUNTER_L6' 
-- Equation name is 'ADDRESS_COUNTER_L6', location is LC8_A20, type is buried.
ADDRESS_COUNTER_L6 = DFFE( _EQ011, GLOBAL( DCLK), GLOBAL( VS),  VCC,  VCC);
  _EQ011 =  _LC1_A20 &  _LC4_A14
         #  ADDRESS_COUNTER_L6 & !_LC1_C8;

-- Node name is ':136' = 'ADDRESS_COUNTER_L7' 
-- Equation name is 'ADDRESS_COUNTER_L7', location is LC6_A20, type is buried.

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