cpu.sim.qmsg

这是一个用VHDL开发的RS422通讯程序,在ALTERA FLEX EPF10K上通过了测试

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Simulator " "Info: Running Quartus II Simulator" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.2 Build 157 12/07/2004 SJ Full Version " "Info: Version 4.2 Build 157 12/07/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Nov 11 14:20:59 2007 " "Info: Processing started: Sun Nov 11 14:20:59 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sim --import_settings_files=on --export_settings_files=off cpu -c cpu " "Info: Command: quartus_sim --import_settings_files=on --export_settings_files=off cpu -c cpu" {  } {  } 0}
{ "Info" "ISIM_OVERWRITE_WAVEFORM_INPUTS_WITH_SIMULATION_OUTPUTS" "" "Info: Overwriting simulation input file with simulation results" {  } {  } 0}
{ "Info" "ISIM_SIM_SIMULATION_COVERAGE" "     67.64 % " "Info: Simulation coverage is      67.64 %" {  } {  } 0}
{ "Info" "ISIM_SIM_NUMBER_OF_TRANSITION" "444261 " "Info: Number of transitions in simulation is 444261" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Simulator 0 s 0 s " "Info: Quartus II Simulator was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Nov 11 14:21:16 2007 " "Info: Processing ended: Sun Nov 11 14:21:16 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:18 " "Info: Elapsed time: 00:00:18" {  } {  } 0}  } {  } 0}