cpu.map.summary

来自「这是一个用VHDL开发的RS422通讯程序,在ALTERA FLEX EPF10」· SUMMARY 代码 · 共 13 行

Flow Status : Successful - Fri Dec 14 13:47:26 2007
Quartus II Version : 4.2 Build 157 12/07/2004 SJ Full Version
Revision Name : cpu
Top-level Entity Name : cpu
Family : FLEX10KE
Device : EPF10K30ETI144-2
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 1,160
Total pins : 93
Total memory bits : 0
Total PLLs : 0