read_data.vhd

来自「这是一个用VHDL开发的RS422通讯程序,在ALTERA FLEX EPF10」· VHDL 代码 · 共 23 行

library ieee;

use ieee.std_logic_1164.all;

entity read_data is port(
		sa				: in std_logic_vector(15 downto 0);
		ior				: in std_logic;
		on_read_reg		: out std_logic;
		reg_data		: out std_logic_vector(7 downto 0)	
);
end entity;

architecture 	read_data of read_data is

begin	

process()
reg_data 
end process;

end architecture;