cpu.fit.summary

这是一个用VHDL开发的RS422通讯程序,在ALTERA FLEX EPF10K上通过了测试

Flow Status : Successful - Fri Dec 14 13:47:50 2007
Quartus II Version : 4.2 Build 157 12/07/2004 SJ Full Version
Revision Name : cpu
Top-level Entity Name : cpu
Family : FLEX10KE
Device : EPF10K30ETI144-2
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 1,166 / 1,728 ( 67 % )
Total pins : 93 / 102 ( 91 % )
Total memory bits : 0 / 24,576 ( 0 % )
Total PLLs : 0