taxi.fit.eqn

在Quatus下用VerilogHDL语言编写

G6_cs_buffer[4] = j[4] $ G6_cout[3];

--G6_cout[4] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[4] at LC5_A3
--operation mode is arithmetic

G6_cout[4] = CARRY(j[4] & G6_cout[3]);


--A1L45 is i78~167 at LC7_A5
--operation mode is normal

A1L45 = A1L94 & j[4] # !A1L94 & G6_cs_buffer[4] & !A1L631;


--G6_cs_buffer[5] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] at LC6_A3
--operation mode is arithmetic

G6_cs_buffer[5] = j[5] $ G6_cout[4];

--G6_cout[5] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[5] at LC6_A3
--operation mode is arithmetic

G6_cout[5] = CARRY(j[5] & G6_cout[4]);


--A1L35 is i77~167 at LC5_A4
--operation mode is normal

A1L35 = A1L94 & j[5] # !A1L94 & G6_cs_buffer[5] & !A1L631;


--G6_cs_buffer[3] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC4_A3
--operation mode is arithmetic

G6_cs_buffer[3] = j[3] $ G6_cout[2];

--G6_cout[3] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[3] at LC4_A3
--operation mode is arithmetic

G6_cout[3] = CARRY(j[3] & G6_cout[2]);


--A1L55 is i79~167 at LC6_A4
--operation mode is normal

A1L55 = A1L94 & j[3] # !A1L94 & G6_cs_buffer[3] & !A1L631;


--G9_cs_buffer[2] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC3_A13
--operation mode is arithmetic

G9_cs_buffer[2] = k[2] $ G9_cout[1];

--G9_cout[2] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[2] at LC3_A13
--operation mode is arithmetic

G9_cout[2] = CARRY(k[2] & G9_cout[1]);


--A1L05 is i66~0 at LC1_A8
--operation mode is normal

A1L05 = !start # !drive;


--A1L36 is i88~167 at LC5_A15
--operation mode is normal

A1L36 = A1L05 & k[2] # !A1L05 & G9_cs_buffer[2] & !A1L731;


--G9_cs_buffer[3] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC4_A13
--operation mode is arithmetic

G9_cs_buffer[3] = k[3] $ G9_cout[2];

--G9_cout[3] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[3] at LC4_A13
--operation mode is arithmetic

G9_cout[3] = CARRY(k[3] & G9_cout[2]);


--A1L26 is i87~167 at LC6_A15
--operation mode is normal

A1L26 = A1L05 & k[3] # !A1L05 & G9_cs_buffer[3] & !A1L731;


--G9_cs_buffer[1] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC2_A13
--operation mode is arithmetic

G9_cs_buffer[1] = k[1] $ G9_cout[0];

--G9_cout[1] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[1] at LC2_A13
--operation mode is arithmetic

G9_cout[1] = CARRY(k[1] & G9_cout[0]);


--A1L46 is i89~167 at LC3_A14
--operation mode is normal

A1L46 = A1L05 & k[1] # !A1L05 & G9_cs_buffer[1] & !A1L731;


--G9_cs_buffer[6] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] at LC7_A13
--operation mode is arithmetic

G9_cs_buffer[6] = k[6] $ G9_cout[5];

--G9_cout[6] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[6] at LC7_A13
--operation mode is arithmetic

G9_cout[6] = CARRY(k[6] & G9_cout[5]);


--A1L95 is i84~167 at LC6_A14
--operation mode is normal

A1L95 = A1L05 & k[6] # !A1L05 & G9_cs_buffer[6] & !A1L731;


--G9_cs_buffer[5] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] at LC6_A13
--operation mode is arithmetic

G9_cs_buffer[5] = k[5] $ G9_cout[4];

--G9_cout[5] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[5] at LC6_A13
--operation mode is arithmetic

G9_cout[5] = CARRY(k[5] & G9_cout[4]);


--A1L06 is i85~167 at LC7_A15
--operation mode is normal

A1L06 = A1L05 & k[5] # !A1L05 & G9_cs_buffer[5] & !A1L731;


--A1L85 is i83~168 at LC8_A15
--operation mode is normal

A1L85 = A1L05 & k[7] # !A1L05 & E3_unreg_res_node[7] & !A1L731;


--G9_cs_buffer[4] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC5_A13
--operation mode is arithmetic

G9_cs_buffer[4] = k[4] $ G9_cout[3];

--G9_cout[4] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[4] at LC5_A13
--operation mode is arithmetic

G9_cout[4] = CARRY(k[4] & G9_cout[3]);


--A1L16 is i86~167 at LC8_A14
--operation mode is normal

A1L16 = A1L05 & k[4] # !A1L05 & G9_cs_buffer[4] & !A1L731;


--A1L74 is i17~0 at LC1_A5
--operation mode is normal

A1L74 = !j[0] & !A1L631;


--E2_unreg_res_node[7] is lpm_add_sub:i_rtl_4|addcore:adder|unreg_res_node[7] at LC8_A3
--operation mode is normal

E2_unreg_res_node[7] = G6_cout[6] $ j[7];


--A1L84 is i31~0 at LC1_A16
--operation mode is normal

A1L84 = !k[0] & !A1L731;


--E3_unreg_res_node[7] is lpm_add_sub:i_rtl_5|addcore:adder|unreg_res_node[7] at LC8_A13
--operation mode is normal

E3_unreg_res_node[7] = G9_cout[6] $ k[7];


--reset is reset at Pin_9
--operation mode is input

reset = INPUT();


--f64 is f64 at Pin_3
--operation mode is input

f64 = INPUT();


--drive is drive at Pin_10
--operation mode is input

drive = INPUT();


--start is start at Pin_8
--operation mode is input

start = INPUT();


--cha3[3] is cha3[3] at Pin_69
--operation mode is output

cha3[3] = OUTPUT(D1_q[3]);


--cha3[2] is cha3[2] at Pin_67
--operation mode is output

cha3[2] = OUTPUT(A1L43);


--cha3[1] is cha3[1] at Pin_66
--operation mode is output

cha3[1] = OUTPUT(A1L23);


--cha3[0] is cha3[0] at Pin_65
--operation mode is output

cha3[0] = OUTPUT(D1_q[0]);


--cha2[3] is cha2[3] at Pin_64
--operation mode is output

cha2[3] = OUTPUT(A1L82Q);


--cha2[2] is cha2[2] at Pin_62
--operation mode is output

cha2[2] = OUTPUT(A1L62Q);


--cha2[1] is cha2[1] at Pin_61
--operation mode is output

cha2[1] = OUTPUT(A1L42Q);


--cha2[0] is cha2[0] at Pin_60
--operation mode is output

cha2[0] = OUTPUT(A1L22Q);


--cha1[3] is cha1[3] at Pin_59
--operation mode is output

cha1[3] = OUTPUT(A1L91Q);


--cha1[2] is cha1[2] at Pin_58
--operation mode is output

cha1[2] = OUTPUT(A1L71Q);


--cha1[1] is cha1[1] at Pin_54
--operation mode is output

cha1[1] = OUTPUT(A1L51Q);


--cha1[0] is cha1[0] at Pin_53
--operation mode is output

cha1[0] = OUTPUT(A1L31Q);


--cha0[3] is cha0[3] at Pin_52
--operation mode is output

cha0[3] = OUTPUT(A1L01Q);


--cha0[2] is cha0[2] at Pin_51
--operation mode is output

cha0[2] = OUTPUT(A1L8Q);


--cha0[1] is cha0[1] at Pin_50
--operation mode is output

cha0[1] = OUTPUT(A1L6Q);


--cha0[0] is cha0[0] at Pin_49
--operation mode is output

cha0[0] = OUTPUT(A1L3);


--km1[3] is km1[3] at Pin_48
--operation mode is output

km1[3] = OUTPUT(A1L471);


--km1[2] is km1[2] at Pin_47
--operation mode is output

km1[2] = OUTPUT(A1L271);


--km1[1] is km1[1] at Pin_39
--operation mode is output

km1[1] = OUTPUT(A1L071);


--km1[0] is km1[0] at Pin_38
--operation mode is output

km1[0] = OUTPUT(A1L861);


--km0[3] is km0[3] at Pin_37
--operation mode is output

km0[3] = OUTPUT(A1L561Q);


--km0[2] is km0[2] at Pin_36
--operation mode is output

km0[2] = OUTPUT(A1L361Q);


--km0[1] is km0[1] at Pin_35
--operation mode is output

km0[1] = OUTPUT(A1L161Q);


--km0[0] is km0[0] at Pin_30
--operation mode is output

km0[0] = OUTPUT(A1L951Q);


--min1[3] is min1[3] at Pin_29
--operation mode is output

min1[3] = OUTPUT(A1L291);


--min1[2] is min1[2] at Pin_28
--operation mode is output

min1[2] = OUTPUT(A1L091);


--min1[1] is min1[1] at Pin_27
--operation mode is output

min1[1] = OUTPUT(D3_q[1]);


--min1[0] is min1[0] at Pin_25
--operation mode is output

min1[0] = OUTPUT(D3_q[0]);


--min0[3] is min0[3] at Pin_24
--operation mode is output

min0[3] = OUTPUT(A1L581Q);


--min0[2] is min0[2] at Pin_23
--operation mode is output

min0[2] = OUTPUT(A1L381Q);


--min0[1] is min0[1] at Pin_22
--operation mode is output

min0[1] = OUTPUT(A1L181Q);


--min0[0] is min0[0] at Pin_21
--operation mode is output

min0[0] = OUTPUT(A1L971Q);


--flagmile[1] is flagmile[1] at Pin_73
--operation mode is output

flagmile[1] = OUTPUT(GND);


--flagmile[0] is flagmile[0] at Pin_72
--operation mode is output

flagmile[0] = OUTPUT(A1L04Q);


--flagmin[1] is flagmin[1] at Pin_71
--operation mode is output

flagmin[1] = OUTPUT(GND);


--flagmin[0] is flagmin[0] at Pin_70
--operation mode is output

flagmin[0] = OUTPUT(A1L54Q);


--A1L591 is reset~7 at LC2_A18
--operation mode is normal

A1L591 = !reset;


--A1L3 is cha0[0]~62 at LC2_B16
--operation mode is normal

A1L3 = A1L4Q;


--A1L471 is km1[3]~1 at LC1_C15
--operation mode is normal

A1L471 = D2_q[3];


--A1L271 is km1[2]~2 at LC2_C14
--operation mode is normal

A1L271 = D2_q[2];


--A1L071 is km1[1]~3 at LC1_C11
--operation mode is normal

A1L071 = D2_q[1];


--A1L861 is km1[0]~4 at LC1_C9
--operation mode is normal

A1L861 = D2_q[0];


--A1L091 is min1[2]~1 at LC3_C4
--operation mode is normal

A1L091 = D3_q[2];


--A1L291 is min1[3]~2 at LC5_B3
--operation mode is normal

A1L291 = D3_q[3];


--A1L23 is cha3[1]~1 at LC3_B11
--operation mode is normal

A1L23 = D1_q[1];


--A1L43 is cha3[2]~2 at LC1_B12
--operation mode is normal

A1L43 = D1_q[2];