📄 prev_cmp_taxi.qmsg
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{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(193) " "Warning (10230): Verilog HDL assignment warning at taxi.v(193): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 193 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(194) " "Warning (10230): Verilog HDL assignment warning at taxi.v(194): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 194 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(198) " "Warning (10230): Verilog HDL assignment warning at taxi.v(198): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 198 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(199) " "Warning (10230): Verilog HDL assignment warning at taxi.v(199): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 199 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(200) " "Warning (10230): Verilog HDL assignment warning at taxi.v(200): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 200 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(204) " "Warning (10230): Verilog HDL assignment warning at taxi.v(204): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 204 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(205) " "Warning (10230): Verilog HDL assignment warning at taxi.v(205): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 205 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(206) " "Warning (10230): Verilog HDL assignment warning at taxi.v(206): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 206 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(207) " "Warning (10230): Verilog HDL assignment warning at taxi.v(207): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 207 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(211) " "Warning (10230): Verilog HDL assignment warning at taxi.v(211): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 211 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(212) " "Warning (10230): Verilog HDL assignment warning at taxi.v(212): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 212 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(213) " "Warning (10230): Verilog HDL assignment warning at taxi.v(213): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 213 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(224) " "Warning (10230): Verilog HDL assignment warning at taxi.v(224): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 224 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(235) " "Warning (10230): Verilog HDL assignment warning at taxi.v(235): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 235 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(243) " "Warning (10230): Verilog HDL assignment warning at taxi.v(243): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 243 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(244) " "Warning (10230): Verilog HDL assignment warning at taxi.v(244): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 244 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(248) " "Warning (10230): Verilog HDL assignment warning at taxi.v(248): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 248 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(249) " "Warning (10230): Verilog HDL assignment warning at taxi.v(249): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 249 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(250) " "Warning (10230): Verilog HDL assignment warning at taxi.v(250): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 250 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(254) " "Warning (10230): Verilog HDL assignment warning at taxi.v(254): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 254 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(255) " "Warning (10230): Verilog HDL assignment warning at taxi.v(255): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 255 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(256) " "Warning (10230): Verilog HDL assignment warning at taxi.v(256): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 256 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(257) " "Warning (10230): Verilog HDL assignment warning at taxi.v(257): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 257 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(261) " "Warning (10230): Verilog HDL assignment warning at taxi.v(261): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 261 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 taxi.v(262) " "Warning (10230): Verilog HDL assignment warning at taxi.v(262): truncated value with size 32 to match size of target (4)" { } { { "taxi.v" "" { Text "F:/study/course/课程设计/my taxi/taxi.v" 262 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
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