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📄 taxi.map.eqn

📁 在Quatus下用VerilogHDL语言编写
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A1L28 = A1L68 & A1L321;


--A1L38 is i713~153
--operation mode is normal

A1L38 = A1L801 & (A1L48 # A1L28 & !A1L36) # !A1L801 & A1L28 & !A1L36;


--A1L011 is i1298~483
--operation mode is normal

A1L011 = (A1L511 # !A1L38 & (!A1L18 # !A1L61Q)) & CASCADE(A1L901);


--A1L56 is i658~0
--operation mode is normal

A1L56 = A1L81Q $ A1L41Q;


--A1L46 is i349~0
--operation mode is normal

A1L46 = A1L41Q & (A1L21Q $ !A1L81Q) # !A1L41Q & (A1L21Q & !A1L81Q # !A1L21Q & A1L81Q & A1L61Q);


--A1L111 is i1299~403
--operation mode is normal

A1L111 = A1L421 & A1L56 # !A1L421 & !A1L46 # !A1L511;


--A1L58 is i714~94
--operation mode is normal

A1L58 = A1L41Q & (A1L18 # A1L48 & A1L81Q) # !A1L41Q & A1L48 & !A1L81Q;


--A1L211 is i1299~405
--operation mode is normal

A1L211 = (A1L511 # !A1L58 & (!A1L46 # !A1L28)) & CASCADE(A1L111);


--A1L08 is i711~64
--operation mode is normal

A1L08 = A1L68 & !A1L3Q # !A1L68 & !reset & A1L3Q;


--A1L301 is i1296~4
--operation mode is normal

A1L301 = miles & (A1L921 & A1L08 # !A1L921 & A1L3Q) # !miles & A1L08;


--j[2] is j[2]
--operation mode is normal

j[2]_lut_out = A1L35 & !reset;
j[2] = DFFEA(j[2]_lut_out, f64, , , , , );


--j[1] is j[1]
--operation mode is normal

j[1]_lut_out = A1L45 & !reset;
j[1] = DFFEA(j[1]_lut_out, f64, , , , , );


--j[0] is j[0]
--operation mode is clrb_cntr

j[0]_lut_out = ((j[0] & A1L64) # (A1L44 & !A1L64)) & A1L681;
j[0] = DFFEA(j[0]_lut_out, f64, , , , , );

--G6_cout[0] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is clrb_cntr

G6_cout[0] = CARRY(j[0]);


--j[7] is j[7]
--operation mode is normal

j[7]_lut_out = A1L84 & !reset;
j[7] = DFFEA(j[7]_lut_out, f64, , , , , );


--A1L131 is i~786
--operation mode is normal

A1L131 = !j[2] & !j[1] & !j[0] & !j[7];


--j[6] is j[6]
--operation mode is normal

j[6]_lut_out = A1L94 & !reset;
j[6] = DFFEA(j[6]_lut_out, f64, , , , , );


--j[4] is j[4]
--operation mode is normal

j[4]_lut_out = A1L15 & !reset;
j[4] = DFFEA(j[4]_lut_out, f64, , , , , );


--j[5] is j[5]
--operation mode is normal

j[5]_lut_out = A1L05 & !reset;
j[5] = DFFEA(j[5]_lut_out, f64, , , , , );


--j[3] is j[3]
--operation mode is normal

j[3]_lut_out = A1L25 & !reset;
j[3] = DFFEA(j[3]_lut_out, f64, , , , , );


--A1L331 is i~790
--operation mode is normal

A1L331 = (j[6] & j[4] & !j[5] & !j[3]) & CASCADE(A1L131);


--k[2] is k[2]
--operation mode is normal

k[2]_lut_out = A1L06 & !reset;
k[2] = DFFEA(k[2]_lut_out, f64, , , , , );


--k[3] is k[3]
--operation mode is normal

k[3]_lut_out = A1L95 & !reset;
k[3] = DFFEA(k[3]_lut_out, f64, , , , , );


--k[1] is k[1]
--operation mode is normal

k[1]_lut_out = A1L16 & !reset;
k[1] = DFFEA(k[1]_lut_out, f64, , , , , );


--k[0] is k[0]
--operation mode is clrb_cntr

k[0]_lut_out = ((k[0] & A1L74) # (A1L54 & !A1L74)) & A1L681;
k[0] = DFFEA(k[0]_lut_out, f64, , , , , );

--G9_cout[0] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is clrb_cntr

G9_cout[0] = CARRY(k[0]);


--A1L231 is i~788
--operation mode is normal

A1L231 = k[2] & !k[3] & !k[1] & !k[0];


--k[6] is k[6]
--operation mode is normal

k[6]_lut_out = A1L65 & !reset;
k[6] = DFFEA(k[6]_lut_out, f64, , , , , );


--k[5] is k[5]
--operation mode is normal

k[5]_lut_out = A1L75 & !reset;
k[5] = DFFEA(k[5]_lut_out, f64, , , , , );


--k[7] is k[7]
--operation mode is normal

k[7]_lut_out = A1L55 & !reset;
k[7] = DFFEA(k[7]_lut_out, f64, , , , , );


--k[4] is k[4]
--operation mode is normal

k[4]_lut_out = A1L85 & !reset;
k[4] = DFFEA(k[4]_lut_out, f64, , , , , );


--A1L431 is i~791
--operation mode is normal

A1L431 = (k[6] & k[5] & !k[7] & !k[4]) & CASCADE(A1L231);


--G6_cs_buffer[2] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

G6_cs_buffer[2] = j[2] $ G6_cout[1];

--G6_cout[2] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

G6_cout[2] = CARRY(j[2] & G6_cout[1]);


--A1L64 is i58~0
--operation mode is normal

A1L64 = drive # !start;


--A1L35 is i80~167
--operation mode is normal

A1L35 = A1L64 & j[2] # !A1L64 & G6_cs_buffer[2] & !A1L331;


--G6_cs_buffer[1] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

G6_cs_buffer[1] = j[1] $ G6_cout[0];

--G6_cout[1] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

G6_cout[1] = CARRY(j[1] & G6_cout[0]);


--A1L45 is i81~167
--operation mode is normal

A1L45 = A1L64 & j[1] # !A1L64 & G6_cs_buffer[1] & !A1L331;


--A1L84 is i75~167
--operation mode is normal

A1L84 = A1L64 & j[7] # !A1L64 & E2_unreg_res_node[7] & !A1L331;


--G6_cs_buffer[6] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]
--operation mode is arithmetic

G6_cs_buffer[6] = j[6] $ G6_cout[5];

--G6_cout[6] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[6]
--operation mode is arithmetic

G6_cout[6] = CARRY(j[6] & G6_cout[5]);


--A1L94 is i76~168
--operation mode is normal

A1L94 = A1L64 & j[6] # !A1L64 & G6_cs_buffer[6] & !A1L331;


--G6_cs_buffer[4] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

G6_cs_buffer[4] = j[4] $ G6_cout[3];

--G6_cout[4] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

G6_cout[4] = CARRY(j[4] & G6_cout[3]);


--A1L15 is i78~167
--operation mode is normal

A1L15 = A1L64 & j[4] # !A1L64 & G6_cs_buffer[4] & !A1L331;


--G6_cs_buffer[5] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

G6_cs_buffer[5] = j[5] $ G6_cout[4];

--G6_cout[5] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

G6_cout[5] = CARRY(j[5] & G6_cout[4]);


--A1L05 is i77~167
--operation mode is normal

A1L05 = A1L64 & j[5] # !A1L64 & G6_cs_buffer[5] & !A1L331;


--G6_cs_buffer[3] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

G6_cs_buffer[3] = j[3] $ G6_cout[2];

--G6_cout[3] is lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

G6_cout[3] = CARRY(j[3] & G6_cout[2]);


--A1L25 is i79~167
--operation mode is normal

A1L25 = A1L64 & j[3] # !A1L64 & G6_cs_buffer[3] & !A1L331;


--G9_cs_buffer[2] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

G9_cs_buffer[2] = k[2] $ G9_cout[1];

--G9_cout[2] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

G9_cout[2] = CARRY(k[2] & G9_cout[1]);


--A1L74 is i66~0
--operation mode is normal

A1L74 = !start # !drive;


--A1L06 is i88~167
--operation mode is normal

A1L06 = A1L74 & k[2] # !A1L74 & G9_cs_buffer[2] & !A1L431;


--G9_cs_buffer[3] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

G9_cs_buffer[3] = k[3] $ G9_cout[2];

--G9_cout[3] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

G9_cout[3] = CARRY(k[3] & G9_cout[2]);


--A1L95 is i87~167
--operation mode is normal

A1L95 = A1L74 & k[3] # !A1L74 & G9_cs_buffer[3] & !A1L431;


--G9_cs_buffer[1] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

G9_cs_buffer[1] = k[1] $ G9_cout[0];

--G9_cout[1] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

G9_cout[1] = CARRY(k[1] & G9_cout[0]);


--A1L16 is i89~167
--operation mode is normal

A1L16 = A1L74 & k[1] # !A1L74 & G9_cs_buffer[1] & !A1L431;


--G9_cs_buffer[6] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]
--operation mode is arithmetic

G9_cs_buffer[6] = k[6] $ G9_cout[5];

--G9_cout[6] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[6]
--operation mode is arithmetic

G9_cout[6] = CARRY(k[6] & G9_cout[5]);


--A1L65 is i84~167
--operation mode is normal

A1L65 = A1L74 & k[6] # !A1L74 & G9_cs_buffer[6] & !A1L431;


--G9_cs_buffer[5] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

G9_cs_buffer[5] = k[5] $ G9_cout[4];

--G9_cout[5] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

G9_cout[5] = CARRY(k[5] & G9_cout[4]);


--A1L75 is i85~167
--operation mode is normal

A1L75 = A1L74 & k[5] # !A1L74 & G9_cs_buffer[5] & !A1L431;


--A1L55 is i83~168
--operation mode is normal

A1L55 = A1L74 & k[7] # !A1L74 & E3_unreg_res_node[7] & !A1L431;


--G9_cs_buffer[4] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

G9_cs_buffer[4] = k[4] $ G9_cout[3];

--G9_cout[4] is lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

G9_cout[4] = CARRY(k[4] & G9_cout[3]);


--A1L85 is i86~167
--operation mode is normal

A1L85 = A1L74 & k[4] # !A1L74 & G9_cs_buffer[4] & !A1L431;


--A1L44 is i17~0
--operation mode is normal

A1L44 = !j[0] & !A1L331;


--E2_unreg_res_node[7] is lpm_add_sub:i_rtl_4|addcore:adder|unreg_res_node[7]
--operation mode is normal

E2_unreg_res_node[7] = G6_cout[6] $ j[7];


--A1L54 is i31~0
--operation mode is normal

A1L54 = !k[0] & !A1L431;


--E3_unreg_res_node[7] is lpm_add_sub:i_rtl_5|addcore:adder|unreg_res_node[7]
--operation mode is normal

E3_unreg_res_node[7] = G9_cout[6] $ k[7];


--reset is reset
--operation mode is input

reset = INPUT();


--f64 is f64
--operation mode is input

f64 = INPUT();


--drive is drive
--operation mode is input

drive = INPUT();


--start is start
--operation mode is input

start = INPUT();


--cha3[3] is cha3[3]
--operation mode is output

cha3[3] = OUTPUT(D1_q[3]);


--cha3[2] is cha3[2]
--operation mode is output

cha3[2] = OUTPUT(D1_q[2]);


--cha3[1] is cha3[1]
--operation mode is output

cha3[1] = OUTPUT(D1_q[1]);


--cha3[0] is cha3[0]
--operation mode is output

cha3[0] = OUTPUT(D1_q[0]);


--cha2[3] is cha2[3]
--operation mode is output

cha2[3] = OUTPUT(A1L72Q);


--cha2[2] is cha2[2]
--operation mode is output

cha2[2] = OUTPUT(A1L52Q);


--cha2[1] is cha2[1]
--operation mode is output

cha2[1] = OUTPUT(A1L32Q);


--cha2[0] is cha2[0]
--operation mode is output

cha2[0] = OUTPUT(A1L12Q);


--cha1[3] is cha1[3]
--operation mode is output

cha1[3] = OUTPUT(A1L81Q);


--cha1[2] is cha1[2]
--operation mode is output

cha1[2] = OUTPUT(A1L61Q);


--cha1[1] is cha1[1]
--operation mode is output

cha1[1] = OUTPUT(A1L41Q);


--cha1[0] is cha1[0]
--operation mode is output

cha1[0] = OUTPUT(A1L21Q);


--cha0[3] is cha0[3]
--operation mode is output

cha0[3] = OUTPUT(A1L9Q);


--cha0[2] is cha0[2]
--operation mode is output

cha0[2] = OUTPUT(A1L7Q);


--cha0[1] is cha0[1]
--operation mode is output

cha0[1] = OUTPUT(A1L5Q);


--cha0[0] is cha0[0]
--operation mode is output

cha0[0] = OUTPUT(A1L3Q);


--km1[3] is km1[3]
--operation mode is output

km1[3] = OUTPUT(D2_q[3]);


--km1[2] is km1[2]
--operation mode is output

km1[2] = OUTPUT(D2_q[2]);


--km1[1] is km1[1]
--operation mode is output

km1[1] = OUTPUT(D2_q[1]);


--km1[0] is km1[0]
--operation mode is output

km1[0] = OUTPUT(D2_q[0]);


--km0[3] is km0[3]
--operation mode is output

km0[3] = OUTPUT(A1L261Q);


--km0[2] is km0[2]
--operation mode is output

km0[2] = OUTPUT(A1L061Q);


--km0[1] is km0[1]
--operation mode is output

km0[1] = OUTPUT(A1L851Q);


--km0[0] is km0[0]
--operation mode is output

km0[0] = OUTPUT(A1L651Q);


--min1[3] is min1[3]
--operation mode is output

min1[3] = OUTPUT(D3_q[3]);


--min1[2] is min1[2]
--operation mode is output

min1[2] = OUTPUT(D3_q[2]);


--min1[1] is min1[1]
--operation mode is output

min1[1] = OUTPUT(D3_q[1]);


--min1[0] is min1[0]
--operation mode is output

min1[0] = OUTPUT(D3_q[0]);


--min0[3] is min0[3]
--operation mode is output

min0[3] = OUTPUT(A1L871Q);


--min0[2] is min0[2]
--operation mode is output

min0[2] = OUTPUT(A1L671Q);


--min0[1] is min0[1]
--operation mode is output

min0[1] = OUTPUT(A1L471Q);


--min0[0] is min0[0]
--operation mode is output

min0[0] = OUTPUT(A1L271Q);


--flagmile[1] is flagmile[1]
--operation mode is output

flagmile[1] = OUTPUT(GND);


--flagmile[0] is flagmile[0]
--operation mode is output

flagmile[0] = OUTPUT(A1L73Q);


--flagmin[1] is flagmin[1]
--operation mode is output

flagmin[1] = OUTPUT(GND);


--flagmin[0] is flagmin[0]
--operation mode is output

flagmin[0] = OUTPUT(A1L24Q);


--A1L681 is reset~7
--operation mode is normal

A1L681 = !reset;


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