modulator_translate.v

运用FPGA控制AD9957的操作

////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.
////////////////////////////////////////////////////////////////////////////////
//   ____  ____
//  /   /\/   /
// /___/  \  /    Vendor: Xilinx
// \   \   \/     Version: I.27
//  \   \         Application: netgen
//  /   /         Filename: modulator_translate.v
// /___/   /\     Timestamp: Sun Jan 27 14:31:23 2008
// \   \  /  \ 
//  \___\/\___\
//             
// Command	: -intstyle ise -w -dir netgen/translate -ofmt verilog -sim modulator.ngd modulator_translate.v 
// Device	: 3s200ft256-4
// Input file	: modulator.ngd
// Output file	: E:\work\modulator_single\netgen\translate\modulator_translate.v
// # of Modules	: 1
// Design Name	: modulator
// Xilinx        : D:\Xilinx
//             
// Purpose:    
//     This verilog netlist is a verification model and uses simulation 
//     primitives which may not represent the true implementation of the 
//     device, however the netlist is functionally correct and should not 
//     be modified. This file cannot be synthesized and should only be used 
//     with supported simulation tools.
//             
// Reference:  
//     Development System Reference Guide, Chapter 23
//     Synthesis and Simulation Design Guide, Chapter 6
//             
////////////////////////////////////////////////////////////////////////////////

`timescale 1 ns/1 ps

module modulator (
  gclk, ex_pm, ex_bds, ex_opt, ex_pms, ex_ppt, ex_opt0, ex_opt1, ex_clk, sdo, io_reset, pdclk, ncs, io_update, tx_en, rt, osk, sclk, sdio, pwr_dwn, tp
, profile, tp_out, dout
);
  input gclk;
  input ex_pm;
  input ex_bds;
  input ex_opt;
  input ex_pms;
  input ex_ppt;
  input ex_opt0;
  input ex_opt1;
  input ex_clk;
  input sdo;
  output io_reset;
  output pdclk;
  output ncs;
  output io_update;
  output tx_en;
  output rt;
  output osk;
  output sclk;
  output sdio;
  output pwr_dwn;
  input [7 : 0] tp;
  output [2 : 0] profile;
  output [5 : 0] tp_out;
  output [17 : 0] dout;
  wire \ad9957_single_inst/serl/ncs_20 ;
  wire tx_en_OBUF_21;
  wire ex_opt0_IBUF_22;
  wire \ad9957_single_inst/serl/sclk_23 ;
  wire clk;
  wire start_single_24;
  wire clk_locked;
  wire _n0002;
  wire option;
  wire \ad9957_single_inst/end_single_25 ;
  wire tp_out_5_26;
  wire tp_out_3_27;
  wire tp_out_2_28;
  wire tp_out_1_29;
  wire tp_out_0_30;
  wire \state_nxt[8] ;
  wire \state_nxt[7] ;
  wire \state_nxt[6] ;
  wire \state_nxt[1] ;
  wire \state_cur[8] ;
  wire \state_cur[7] ;
  wire \state_cur[6] ;
  wire \state_cur[1] ;
  wire clk_locked_INV;
  wire \clkdcm_inst/CLKIN_IBUFG_OUT ;
  wire \clkdcm_inst/CLK0_BUF ;
  wire \ad9957_single_inst/serl/end_serial_31 ;
  wire \ad9957_single_inst/_n0016 ;
  wire \ad9957_single_inst/ser_start_32 ;
  wire \ad9957_single_inst/serl/ser_out_33 ;
  wire \ad9957_single_inst/data_in[52] ;
  wire \ad9957_single_inst/data_in[30] ;
  wire \ad9957_single_inst/data_in[24] ;
  wire \ad9957_single_inst/data_in[21] ;
  wire \ad9957_single_inst/data_in[20] ;
  wire \ad9957_single_inst/data_in[19] ;
  wire \ad9957_single_inst/data_in[15] ;
  wire \ad9957_single_inst/data_in[8] ;
  wire \ad9957_single_inst/data_in[0] ;
  wire \ad9957_single_inst/_n0017[52] ;
  wire \ad9957_single_inst/_n0017[30] ;
  wire \ad9957_single_inst/_n0017[24] ;
  wire \ad9957_single_inst/_n0017[21] ;
  wire \ad9957_single_inst/_n0017[20] ;
  wire \ad9957_single_inst/_n0017[19] ;
  wire \ad9957_single_inst/_n0017[15] ;
  wire \ad9957_single_inst/_n0017[8] ;
  wire \ad9957_single_inst/_n0017[0] ;
  wire \ad9957_single_inst/state_cur_FFd1_34 ;
  wire \ad9957_single_inst/state_cur_FFd2_35 ;
  wire \ad9957_single_inst/state_cur_FFd3_36 ;
  wire \ad9957_single_inst/state_cur_FFd4_37 ;
  wire \ad9957_single_inst/state_cur_FFd2-In ;
  wire \ad9957_single_inst/state_cur_FFd3-In ;
  wire N7;
  wire N15;
  wire N45;
  wire \ad9957_single_inst/serl/g_addr_data_38 ;
  wire \ad9957_single_inst/serl/_n0002 ;
  wire \ad9957_single_inst/serl/_n0016 ;
  wire \ad9957_single_inst/serl/_n0017 ;
  wire \ad9957_single_inst/serl/_n0018 ;
  wire \ad9957_single_inst/serl/_n0019 ;
  wire \ad9957_single_inst/serl/_n0086 ;
  wire \ad9957_single_inst/serl/shift_data[52] ;
  wire \ad9957_single_inst/serl/shift_data[30] ;
  wire \ad9957_single_inst/serl/shift_data[24] ;
  wire \ad9957_single_inst/serl/shift_data[21] ;
  wire \ad9957_single_inst/serl/shift_data[20] ;
  wire \ad9957_single_inst/serl/shift_data[19] ;
  wire \ad9957_single_inst/serl/shift_data[15] ;
  wire \ad9957_single_inst/serl/shift_data[8] ;
  wire \ad9957_single_inst/serl/shift_data[3] ;
  wire \ad9957_single_inst/serl/shift_data[2] ;
  wire \ad9957_single_inst/serl/shift_data[1] ;
  wire \ad9957_single_inst/serl/shift_data[0] ;
  wire \ad9957_single_inst/serl/_n0084[52] ;
  wire \ad9957_single_inst/serl/_n0084[30] ;
  wire \ad9957_single_inst/serl/_n0084[24] ;
  wire \ad9957_single_inst/serl/_n0084[21] ;
  wire \ad9957_single_inst/serl/_n0084[20] ;
  wire \ad9957_single_inst/serl/_n0084[19] ;
  wire \ad9957_single_inst/serl/_n0084[15] ;
  wire \ad9957_single_inst/serl/_n0084[8] ;
  wire \ad9957_single_inst/serl/_n0084[3] ;
  wire \ad9957_single_inst/serl/_n0084[2] ;
  wire \ad9957_single_inst/serl/_n0084[1] ;
  wire \ad9957_single_inst/serl/_n0084[0] ;
  wire \ad9957_single_inst/serl/_n0085[4] ;
  wire \ad9957_single_inst/serl/_n0085[2] ;
  wire \ad9957_single_inst/serl/_n0085[1] ;
  wire \ad9957_single_inst/serl/_n0085[0] ;
  wire \ad9957_single_inst/serl/mux_1__n0000 ;
  wire \ad9957_single_inst/serl/mux_1_shift_cnt<2>1 ;
  wire \ad9957_single_inst/serl/mux_1_shift_cnt<2>_MUXF5 ;
  wire \ad9957_single_inst/serl/mux_1_N6 ;
  wire \ad9957_single_inst/serl/mux_1_N7 ;
  wire \ad9957_single_inst/serl/mux_1_shift_cnt<2>_MUXF51 ;
  wire \ad9957_single_inst/serl/mux_1_N8 ;
  wire \ad9957_single_inst/serl/mux_1_N9 ;
  wire \ad9957_single_inst/serl/mux_1_shift_cnt<2>_MUXF52 ;
  wire \ad9957_single_inst/serl/mux_1_shift_cnt<3>_MUXF6 ;
  wire \ad9957_single_inst/serl/serial__n0089<4>_cyo ;
  wire \ad9957_single_inst/serl/state_cur_FFd2_39 ;
  wire \ad9957_single_inst/serl/state_cur_FFd3_40 ;
  wire \ad9957_single_inst/serl/state_cur_FFd4_41 ;
  wire \ad9957_single_inst/serl/state_cur_FFd2-In_42 ;
  wire \ad9957_single_inst/serl/state_cur_FFd3-In ;
  wire \ad9957_single_inst/serl/state_cur_FFd4-In ;
  wire \ad9957_single_inst/serl/N6 ;
  wire \ad9957_single_inst/serl/N11 ;
  wire \ad9957_single_inst/serl/N12 ;
  wire \ad9957_single_inst/serl/N13 ;
  wire \ad9957_single_inst/serl/N14 ;
  wire \ad9957_single_inst/serl/N15 ;
  wire \ad9957_single_inst/serl/N16 ;
  wire \ad9957_single_inst/serl/N141 ;
  wire \ad9957_single_inst/serl/N151 ;
  wire \ad9957_single_inst/serl/N191 ;
  wire \ad9957_single_inst/state_cur_FFd4-In1_map225 ;
  wire \ad9957_single_inst/state_cur_FFd4-In1_map237 ;
  wire N78;
  wire \ad9957_single_inst/serl/_n0085<5>_map241 ;
  wire \ad9957_single_inst/serl/_n0085<5>_map243 ;
  wire \ad9957_single_inst/serl/_n0085<2>_map253 ;
  wire \ad9957_single_inst/serl/_n0085<2>_map259 ;
  wire N142;
  wire N143;
  wire \ad9957_single_inst/serl/_n0085<3>_map264 ;
  wire \ad9957_single_inst/serl/_n0085<3>_map272 ;
  wire \ad9957_single_inst/serl/_n0085<7>_map280 ;
  wire \ad9957_single_inst/serl/_n0085<7>_map283 ;
  wire \ad9957_single_inst/serl/_n0085<7>_map287 ;
  wire \ad9957_single_inst/serl/_n0085<6>_map299 ;
  wire \ad9957_single_inst/serl/_n0085<6>_map310 ;
  wire N271;
  wire N272;
  wire N273;
  wire N274;
  wire N275;
  wire N276;
  wire N277;
  wire N278;
  wire N279;
  wire N288;
  wire N291;
  wire N313;
  wire N317;
  wire N322;
  wire N323;
  wire N325;
  wire N329;
  wire N331;
  wire N335;
  wire N337;
  wire \ad9957_single_inst/serl/state_cur_FFd3_1_43 ;
  wire \ad9957_single_inst/serl/state_cur_FFd2_1_44 ;
  wire \ad9957_single_inst/serl/state_cur_FFd4_1_45 ;
  wire \ad9957_single_inst/serl/state_cur_FFd3_2_46 ;
  wire \ad9957_single_inst/serl/state_cur_FFd4_2_47 ;
  wire \ad9957_single_inst/state_cur_FFd2_1_48 ;
  wire \ad9957_single_inst/state_cur_FFd1_1_49 ;
  wire \ad9957_single_inst/serl/state_cur_FFd3_3_50 ;
  wire \ad9957_single_inst/serl/state_cur_FFd4_3_51 ;
  wire N343;
  wire N344;
  wire N345;
  wire N346;
  wire N347;
  wire N348;
  wire N349;
  wire N350;
  wire N351;
  wire N352;
  wire N353;
  wire N354;
  wire N355;
  wire N356;
  wire \ad9957_single_inst/serl/state_cur_FFd2_2_52 ;
  wire N357;
  wire N358;
  wire N359;
  wire N360;
  wire N361;
  wire N362;
  wire N363;
  wire N364;
  wire N365;
  wire N366;
  wire \_n00021/O ;
  wire \ad9957_single_inst/_n0017<52>2/O ;
  wire \ad9957_single_inst/_n0017<30>2/O ;
  wire \ad9957_single_inst/_n0017<24>2/O ;
  wire \ad9957_single_inst/_n0017<21>2/O ;
  wire \ad9957_single_inst/_n0017<20>2/O ;
  wire \ad9957_single_inst/_n0017<19>2/O ;
  wire \ad9957_single_inst/_n0017<15>2/O ;
  wire \ad9957_single_inst/_n0017<8>2/O ;
  wire \ad9957_single_inst/_n0017<0>2/O ;
  wire \ad9957_single_inst/_n0018<6>2/O ;
  wire \ad9957_single_inst/_n0018<5>2/O ;
  wire \ad9957_single_inst/_n0019<3>2/O ;
  wire \ad9957_single_inst/_n0019<2>2/O ;
  wire \ad9957_single_inst/_n0019<1>2/O ;
  wire \ad9957_single_inst/serl/shift_cnt<1>2/O ;
  wire \ad9957_single_inst/serl/shift_cnt<1>3/O ;
  wire \ad9957_single_inst/serl/shift_cnt<1>4/O ;
  wire \ad9957_single_inst/serl/shift_cnt<1>5/O ;
  wire \ad9957_single_inst/state_cur_FFd4-In122/O ;
  wire \ad9957_single_inst/serl/_n0084<1>1/O ;
  wire \ad9957_single_inst/serl/_n0084<2>1/O ;
  wire \ad9957_single_inst/serl/_n0084<3>1/O ;
  wire \ad9957_single_inst/serl/_n0084<0>1/O ;
  wire \ad9957_single_inst/serl/_n0084<52>1/O ;
  wire \ad9957_single_inst/serl/_n0084<30>1/O ;
  wire \ad9957_single_inst/serl/_n0084<21>1/O ;
  wire \ad9957_single_inst/serl/_n0084<24>1/O ;
  wire \ad9957_single_inst/serl/_n0084<15>1/O ;
  wire \ad9957_single_inst/serl/_n0084<20>1/O ;
  wire \ad9957_single_inst/serl/_n0084<19>1/O ;
  wire \ad9957_single_inst/serl/_n0084<8>1/O ;
  wire \ad9957_single_inst/serl/_n0085<0>1/O ;
  wire \ad9957_single_inst/serl/_n0085<1>/O ;
  wire \ad9957_single_inst/serl/_n0085<4>/O ;
  wire \ad9957_single_inst/serl/_n0085<6>11/O ;
  wire \ad9957_single_inst/state_cur_FFd4-In1721/O ;
  wire \ad9957_single_inst/state_cur_FFd3-In1_SW0/O ;
  wire \ad9957_single_inst/state_cur_FFd3-In1/O ;
  wire \ad9957_single_inst/serl/_n0087<1>1_SW0/O ;
  wire \ad9957_single_inst/serl/_n0087<1>1/O ;
  wire \ad9957_single_inst/serl/_n0085<6>731/O ;
  wire \ad9957_single_inst/serl/_n00171_SW0_SW0/O ;
  wire \ad9957_single_inst/serl/_n00171/O ;
  wire \ad9957_single_inst/serl/_n0085<7>661/O ;
  wire \ad9957_single_inst/serl/_n0085<7>13_SW0/O ;
  wire \ad9957_single_inst/serl/_n0085<2>29_SW0/O ;
  wire \ad9957_single_inst/serl/_n0085<2>42/O ;
  wire \ad9957_single_inst/serl/_n0085<5>8/O ;
  wire \ad9957_single_inst/serl/_n0085<5>321/O ;
  wire \ad9957_single_inst/serl/Ker131_SW0/O ;
  wire \ad9957_single_inst/serl/_n0085<7>42/O ;
  wire \ad9957_single_inst/state_cur_FFd4-In162_SW0/O ;
  wire \ad9957_single_inst/serl/_n0085<4>_SW0/O ;
  wire \ad9957_single_inst/serl/_n0085<3>331_F/O ;
  wire \ad9957_single_inst/serl/_n0085<3>331_G/O ;
  wire \ad9957_single_inst/serl/state_cur_FFd2-In_F/O ;
  wire \ad9957_single_inst/serl/Mmux__n0000__n0000_F_SW0_F/O ;
  wire \ad9957_single_inst/serl/Mmux__n0000__n0000_F_SW0_G/O ;
  wire \ad9957_single_inst/serl/shift_cnt<2>_rn_0111_F/O ;
  wire \ad9957_single_inst/serl/shift_cnt<2>_rn_0111_G/O ;
  wire \ad9957_single_inst/serl/Mmux__n0000__n00001_F/O ;
  wire \ad9957_single_inst/serl/Mmux__n0000__n00001_G/O ;
  wire ex_pm_IBUF_53;
  wire ex_bds_IBUF_54;
  wire ex_opt_IBUF_55;
  wire ex_pms_IBUF_56;
  wire ex_ppt_IBUF_57;
  wire ex_opt1_IBUF_58;
  wire ex_clk_IBUF_59;
  wire sdo_IBUF_60;
  wire \tp<7>_IBUF_61 ;
  wire \tp<6>_IBUF_62 ;
  wire \tp<5>_IBUF_63 ;
  wire \tp<4>_IBUF_64 ;
  wire \tp<3>_IBUF_65 ;
  wire \tp<2>_IBUF_66 ;
  wire \tp<1>_IBUF_67 ;
  wire \tp<0>_IBUF_68 ;
  wire VCC;
  wire GND;
  wire \NLW_clkdcm_inst/DCM_INST_STATUS[7]_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_STATUS[6]_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_STATUS[5]_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_STATUS[4]_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_STATUS[3]_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_STATUS[2]_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_STATUS[1]_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_STATUS[0]_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_CLK90_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_CLK180_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_CLK270_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_CLK2X_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_CLK2X180_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_CLKDV_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_CLKFX_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_CLKFX180_UNCONNECTED ;
  wire \NLW_clkdcm_inst/DCM_INST_PSDONE_UNCONNECTED ;
  wire [3 : 0] _n0000;
  wire [2 : 0] ex_opt0_sync;
  wire [6 : 5] \ad9957_single_inst/len_reg ;
  wire [6 : 5] \ad9957_single_inst/_n0018 ;
  wire [3 : 1] \ad9957_single_inst/ser_addr ;
  wire [3 : 1] \ad9957_single_inst/_n0019 ;
  wire [2 : 0] \ad9957_single_inst/start_sync ;
  wire [2 : 0] \ad9957_single_inst/ser_start_sync ;
  wire [7 : 0] \ad9957_single_inst/serl/shift_cnt ;
  wire [1 : 0] \ad9957_single_inst/serl/dly_cnt ;
  wire [1 : 0] \ad9957_single_inst/serl/_n0087 ;
  X_ONE XST_VCC (
    .O(option)
  );
  X_ZERO XST_GND (
    .O(tx_en_OBUF_21)
  );
  defparam tp_out_5.INIT = 1'b0;
  X_SFF tp_out_5 (
    .I(option),
    .SRST(clk_locked_INV),
    .CLK(clk),
    .O(tp_out_5_26),
    .CE(VCC),
    .SET(GND),
    .RST(GND),
    .SSET(GND)
  );
  defparam tp_out_1.INIT = 1'b0;
  X_SFF tp_out_1 (
    .I(_n0000[1]),
    .SRST(_n0002),
    .CLK(clk),
    .O(tp_out_1_29),
    .CE(VCC),
    .SET(GND),
    .RST(GND),
    .SSET(GND)
  );
  defparam tp_out_2.INIT = 1'b0;
  X_SFF tp_out_2 (
    .I(_n0000[2]),
    .SRST(_n0002),
    .CLK(clk),
    .O(tp_out_2_28),
    .CE(VCC),
    .SET(GND),
    .RST(GND),
    .SSET(GND)
  );
  defparam tp_out_0.INIT = 1'b0;
  X_SFF tp_out_0 (
    .I(_n0000[0]),
    .SRST(_n0002),
    .CLK(clk),
    .O(tp_out_0_30),
    .CE(VCC),