serial_sim_v.fdo

运用FPGA控制AD9957的操作

## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Thu Dec 06 11:00:14 涓?鍥芥爣鍑嗘椂闂? 2007
##
vlib work
vlog  serial.v
vlog  serial_sim.v
vlog  "D:/Xilinx/verilog/src/glbl.v"
vsim -t 1ps   -L xilinxcorelib_ver -L unisims_ver -lib work serial_sim_v glbl
do {serial_sim_v.udo}
view wave
add wave *
add wave /glbl/GSR
view structure
view signals
run 1000ns