modulator.ucf

运用FPGA控制AD9957的操作

#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "dout[0]"  LOC = "C1"  ;
NET "dout[10]"  LOC = "L2"  ;
NET "dout[11]"  LOC = "M1"  ;
NET "dout[12]"  LOC = "M2"  ;
NET "dout[13]"  LOC = "N1"  ;
NET "dout[14]"  LOC = "N2"  ;
NET "dout[15]"  LOC = "P1"  ;
NET "dout[16]"  LOC = "P2"  ;
NET "dout[17]"  LOC = "R1"  ;
NET "dout[1]"  LOC = "D2"  ;
NET "dout[2]"  LOC = "D1"  ;
NET "dout[3]"  LOC = "E2"  ;
NET "dout[4]"  LOC = "E1"  ;
NET "dout[5]"  LOC = "G1"  ;
NET "dout[6]"  LOC = "J2"  ;
NET "dout[7]"  LOC = "J1"  ;
NET "dout[8]"  LOC = "K2"  ;
NET "dout[9]"  LOC = "K1"  ;
NET "ex_bds"  LOC = "A9"  ;
NET "ex_clk"  LOC = "A8"  ;
NET "ex_opt"  LOC = "B12"  ;
NET "ex_opt0"  LOC = "A12"  ;
NET "ex_opt1"  LOC = "B11"  ;
NET "ex_pm"  LOC = "B10"  ;
NET "ex_pms"  LOC = "C9"  ;
NET "ex_ppt"  LOC = "A10"  ;
NET "gclk"  LOC = "T8"  ;
NET "io_reset"  LOC = "J3"  ;
NET "io_update"  LOC = "F3"  ;
NET "ncs"  LOC = "H4"  ;
NET "osk"  LOC = "F2"  ;
NET "pdclk"  LOC = "H1"  ;
NET "profile[0]"  LOC = "B4"  ;
NET "profile[1]"  LOC = "A3"  ;
NET "profile[2]"  LOC = "B1"  ;
NET "pwr_dwn"  LOC = "M3"  ;
NET "rt"  LOC = "C2"  ;
NET "sclk"  LOC = "G4"  ;
NET "sdio"  LOC = "G3"  ;
NET "sdo"  LOC = "H3"  ;
NET "tp[0]"  LOC = "B14"  ;
NET "tp[1]"  LOC = "A14"  ;
NET "tp[2]"  LOC = "B13"  ;
NET "tp[3]"  LOC = "A13"  ;
NET "tp[4]"  LOC = "M16"  ;
NET "tp[5]"  LOC = "N16"  ;
NET "tp[6]"  LOC = "P16"  ;
NET "tp[7]"  LOC = "R16"  ;
NET "tp_out[0]"  LOC = "T5"  ;
NET "tp_out[1]"  LOC = "R5"  ;
NET "tp_out[2]"  LOC = "T4"  ;
NET "tp_out[3]"  LOC = "R4"  ;
NET "tp_out[4]"  LOC = "T3"  ;
NET "tp_out[5]"  LOC = "R3"  ;
NET "tx_en"  LOC = "G2"  ;

#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE