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----------------------------------------------------------------------------
-- altcam
----------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use std.textio.all;
entity altcam is
generic
( width: natural := 1;
widthad: natural := 1;
numwords: natural := 1;
lpm_file: string := "UNUSED";
lpm_filex: string := "UNUSED";
match_mode: string := "MULTIPLE";
output_reg: string := "UNREGISTERED";
output_aclr: string := "OFF";
pattern_reg: string := "INCLOCK";
pattern_aclr: string := "ON";
wraddress_aclr: string := "ON";
wrx_reg: string := "UNUSED";
wrx_aclr: string := "UNUSED";
wrcontrol_aclr: string := "OFF";
use_eab: string := "ON" );
port
( pattern: in std_logic_vector(width-1 downto 0);
wrx: in std_logic_vector(width-1 downto 0) := (others => '0');
wrxused: in std_logic := '1';
wrdelete: in std_logic := '0';
wraddress: in std_logic_vector(widthad-1 downto 0);
wren: in std_logic;
inclock: in std_logic;
inclocken: in std_logic := '1';
inaclr: in std_logic := '0';
mstart: in std_logic := 'X';
mnext: in std_logic := '0';
outclock: in std_logic := '0';
outclocken: in std_logic := '1';
outaclr: in std_logic := '0';
maddress: out std_logic_vector(widthad-1 downto 0);
mbits: out std_logic_vector(numwords-1 downto 0);
mfound: out std_logic;
mcount: out std_logic_vector(widthad-1 downto 0);
rdbusy: out std_logic;
wrbusy: out std_logic );
type lpm_memory is array
(numwords-1 downto 0) of std_logic_vector(width-1 downto 0);
function int_to_str( value : integer ) return string is
variable ivalue,index : integer;
variable digit : integer;
variable line_no: string(8 downto 1) := " ";
begin
ivalue := value;
index := 1;
while (ivalue > 0) loop
digit := ivalue MOD 10;
ivalue := ivalue/10;
case digit is
when 0 =>
line_no(index) := '0';
when 1 =>
line_no(index) := '1';
when 2 =>
line_no(index) := '2';
when 3 =>
line_no(index) := '3';
when 4 =>
line_no(index) := '4';
when 5 =>
line_no(index) := '5';
when 6 =>
line_no(index) := '6';
when 7 =>
line_no(index) := '7';
when 8 =>
line_no(index) := '8';
when 9 =>
line_no(index) := '9';
when others =>
ASSERT FALSE
REPORT "Illegal number!"
SEVERITY ERROR;
end case;
index := index + 1;
end loop;
return line_no;
end;
function hex_str_to_int( str : string ) return integer is
variable len : integer := str'length;
variable ivalue : integer := 0;
variable digit : integer;
begin
for i in len downto 1 loop
case str(i) is
when '0' =>
digit := 0;
when '1' =>
digit := 1;
when '2' =>
digit := 2;
when '3' =>
digit := 3;
when '4' =>
digit := 4;
when '5' =>
digit := 5;
when '6' =>
digit := 6;
when '7' =>
digit := 7;
when '8' =>
digit := 8;
when '9' =>
digit := 9;
when 'A' =>
digit := 10;
when 'a' =>
digit := 10;
when 'B' =>
digit := 11;
when 'b' =>
digit := 11;
when 'C' =>
digit := 12;
when 'c' =>
digit := 12;
when 'D' =>
digit := 13;
when 'd' =>
digit := 13;
when 'E' =>
digit := 14;
when 'e' =>
digit := 14;
when 'F' =>
digit := 15;
when 'f' =>
digit := 15;
when others =>
ASSERT FALSE
REPORT "Illegal character "& str(i) & "in Intel Hex File! "
SEVERITY ERROR;
end case;
ivalue := ivalue * 16 + digit;
end loop;
return ivalue;
end;
procedure Shrink_line(L : inout LINE; pos : in integer) is
subtype nstring is string(1 to pos);
variable stmp : nstring;
begin
if pos >= 1 then
read(l,stmp);
end if;
end;
function hex_to_stdlogicarray (s: string) return lpm_memory is
variable mem_data : lpm_memory;
variable mem_data_word : std_logic_vector(width-1 downto 0);
variable i,j,k,n,m,lineno: integer := 0;
variable buf: line;
variable booval: boolean;
--FILE mem_data_file: TEXT IS IN s;
FILE mem_data_file: TEXT OPEN READ_MODE IS s;
variable base, byte, rec_type, datain, checksum: string(2 downto 1);
variable startadd: string(4 downto 1);
variable ibase: integer := 0;
variable ibyte: integer := 0;
variable istartadd: integer := 0;
variable check_sum_vec, check_sum_vec_tmp: std_logic_vector(7 downto 0);
begin
WHILE NOT ENDFILE(mem_data_file) loop
booval := true;
READLINE(mem_data_file, buf);
lineno := lineno + 1;
check_sum_vec := (OTHERS => '0');
if (buf(buf'LOW) = ':') then -- check for start of record char ':'
i := 1;
shrink_line(buf, i);
READ(L=>buf, VALUE=>byte, good=>booval); -- read length of record (2 hex chars)
if not (booval) then
ASSERT FALSE
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format!"
SEVERITY ERROR;
end if;
ibyte := hex_str_to_int(byte);
check_sum_vec := unsigned(check_sum_vec) + unsigned(CONV_STD_LOGIC_VECTOR(ibyte, 8));
READ(L=>buf, VALUE=>startadd, good=>booval); -- read start/load address (4 hex chars)
if not (booval) then
ASSERT FALSE
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
SEVERITY ERROR;
end if;
istartadd := hex_str_to_int(startadd);
byte(2) := startadd(4);
byte(1) := startadd(3);
check_sum_vec := unsigned(check_sum_vec) + unsigned(CONV_STD_LOGIC_VECTOR(hex_str_to_int(byte), 8));
byte(2) := startadd(2);
byte(1) := startadd(1);
check_sum_vec := unsigned(check_sum_vec) + unsigned(CONV_STD_LOGIC_VECTOR(hex_str_to_int(byte), 8));
READ(L=>buf, VALUE=>rec_type, good=>booval); -- read record type (2 hex chars)
if not (booval) then
ASSERT FALSE
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
SEVERITY ERROR;
end if;
check_sum_vec := unsigned(check_sum_vec) + unsigned(CONV_STD_LOGIC_VECTOR(hex_str_to_int(rec_type), 8));
else
ASSERT FALSE
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
SEVERITY ERROR;
end if;
case rec_type is
when "00"=> -- Data record
i := 0;
k := width/8;
if ( (width MOD 8) /= 0 ) then
k := k + 1;
end if;
-- k = no. of bytes per CAM entry.
while( i < ibyte ) loop
mem_data_word := (others => '0');
n := (k - 1)*8;
m := width - 1;
for j in 1 to k loop
READ(L=>buf, VALUE=>datain,good=>booval); -- read in data a byte (2 hex chars) at a time.
if not (booval) then
ASSERT FALSE
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
SEVERITY ERROR;
end if;
check_sum_vec := unsigned(check_sum_vec) + unsigned(CONV_STD_LOGIC_VECTOR(hex_str_to_int(datain), 8));
mem_data_word(m downto n) := CONV_STD_LOGIC_VECTOR(hex_str_to_int(datain), m-n+1);
m := n - 1;
n := n - 8;
end loop;
i := i + k;
mem_data(ibase + istartadd) := mem_data_word;
istartadd := istartadd + 1;
end loop;
when "01"=>
exit;
when "02"=>
ibase := 0;
if (ibyte /= 2) then
ASSERT FALSE
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format for record type 02! "
SEVERITY ERROR;
end if;
for i in 0 to (ibyte-1) loop
READ(L=>buf, VALUE=>base,good=>booval);
if not (booval) then
ASSERT FALSE
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