ft245_r_w.map.qmsg

USB芯片FT245BM读写代码,在Quartus II V7.2上测试成功!---Verilog语言.

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Feb 23 00:10:07 2008 " "Info: Processing started: Sat Feb 23 00:10:07 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off FT245_R_W -c FT245_R_W " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off FT245_R_W -c FT245_R_W" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Warning" "WVRFX_L3_VERI_XZ_EXTEND_SIGNIFICANT" "FT245_R_W.v(45) " "Warning (10273): Verilog HDL warning at FT245_R_W.v(45): extended using \"x\" or \"z\"" {  } { { "MyDD/FT245_R_W.v" "" { Text "E:/Study FPGA/FT245_R_W/MyDD/FT245_R_W.v" 45 0 0 } }  } 0 10273 "Verilog HDL warning at %1!s!: extended using \"x\" or \"z\"" 1 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "MyDD/FT245_R_W.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file MyDD/FT245_R_W.v" { { "Info" "ISGN_ENTITY_NAME" "1 FT245_R_W " "Info: Found entity 1: FT245_R_W" {  } { { "MyDD/FT245_R_W.v" "" { Text "E:/Study FPGA/FT245_R_W/MyDD/FT245_R_W.v" 9 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "FT245_R_W " "Info: Elaborating entity \"FT245_R_W\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd 7 2 " "Info: Found 7 design units, including 2 entities, in source file c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_signaltap_pack " "Info: Found design unit 1: sld_signaltap_pack" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" 62 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_signaltap_lib " "Info: Found design unit 2: sld_signaltap_lib" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" 70 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "3 sld_signaltap_lib-body " "Info: Found design unit 3: sld_signaltap_lib-body" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" 75 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "4 sld_signaltap-rtl " "Info: Found design unit 4: sld_signaltap-rtl" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" 229 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "5 sld_signaltap_impl-rtl " "Info: Found design unit 5: sld_signaltap_impl-rtl" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" 522 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_signaltap " "Info: Found entity 1: sld_signaltap" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" 131 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_signaltap_impl " "Info: Found entity 2: sld_signaltap_impl" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd" 433 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/sld_ela_control.vhd 4 2 " "Info: Found 4 design units, including 2 entities, in source file c:/altera/72/quartus/libraries/megafunctions/sld_ela_control.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_ela_control-rtl " "Info: Found design unit 1: sld_ela_control-rtl" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_ela_control.vhd" 129 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_ela_basic_multi_level_trigger-rtl " "Info: Found design unit 2: sld_ela_basic_multi_level_trigger-rtl" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_ela_control.vhd" 702 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_ela_control " "Info: Found entity 1: sld_ela_control" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_ela_control.vhd" 71 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_ela_basic_multi_level_trigger " "Info: Found entity 2: sld_ela_basic_multi_level_trigger" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_ela_control.vhd" 669 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/LPM_SHIFTREG.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/LPM_SHIFTREG.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_shiftreg " "Info: Found entity 1: lpm_shiftreg" {  } { { "LPM_SHIFTREG.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/LPM_SHIFTREG.tdf" 39 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/sld_mbpmg.vhd 4 2 " "Info: Found 4 design units, including 2 entities, in source file c:/altera/72/quartus/libraries/megafunctions/sld_mbpmg.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_mbpmg-rtl " "Info: Found design unit 1: sld_mbpmg-rtl" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_mbpmg.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_mbpmg.vhd" 65 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_sbpmg-rtl " "Info: Found design unit 2: sld_sbpmg-rtl" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_mbpmg.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_mbpmg.vhd" 298 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_mbpmg " "Info: Found entity 1: sld_mbpmg" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_mbpmg.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_mbpmg.vhd" 44 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_sbpmg " "Info: Found entity 2: sld_sbpmg" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_mbpmg.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_mbpmg.vhd" 277 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_ela_trigger_flow_mgr-rtl " "Info: Found design unit 1: sld_ela_trigger_flow_mgr-rtl" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 43 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_ela_trigger_flow_mgr " "Info: Found entity 1: sld_ela_trigger_flow_mgr" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 10 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/sld_buffer_manager.vhd 4 2 " "Info: Found 4 design units, including 2 entities, in source file c:/altera/72/quartus/libraries/megafunctions/sld_buffer_manager.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_buffer_manager-rtl " "Info: Found design unit 1: sld_buffer_manager-rtl" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 84 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_offload_buffer_mgr-rtl " "Info: Found design unit 2: sld_offload_buffer_mgr-rtl" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 354 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_buffer_manager " "Info: Found entity 1: sld_buffer_manager" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 47 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_offload_buffer_mgr " "Info: Found entity 2: sld_offload_buffer_mgr" {  } { { "c:/altera/72/quartus/libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "c:/altera/72/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 310 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" 435 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_2to3.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_2to3.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_2to3 " "Info: Found entity 1: altsyncram_2to3" {  } { { "db/altsyncram_2to3.tdf" "" { Text "E:/Study FPGA/FT245_R_W/db/altsyncram_2to3.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}