sram.stx

FPGA系统的sram的软仿真设计

Release 6.3i - xst G.35
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
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=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file G:/MyFPGA/sram2.vhd in Library work.
Architecture behaviour of Entity sram is up to date.
CPU : 0.06 / 0.56 s | Elapsed : 1.00 / 1.00 s
 
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Total memory usage is 48412 kilobytes