buffer1.vhd

来自「用于Quartus软件开发的程序。主要介绍buffer的编写。」· VHDL 代码 · 共 21 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY BUFFER1 IS
      PORT(EN:IN STD_LOGIC;
           I:IN STD_LOGIC_VECTOR(7 DOWNTO 0);
           O:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END;

ARCHITECTURE ALG OF BUFFER1 IS
BEGIN
     PROCESS(I,EN)
     BEGIN
          IF EN='0' THEN
             O<=I;
          ELSE 
             O<="ZZZZZZZZ";
          END IF; 
     END PROCESS;
END;