fir321.fit.eqn

来自「vhdl source,ver-fir-coefficient,simulink」· EQN 代码 · 共 1,465 行 · 第 1/5 页

--D11L11 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][8]~COUT at LC_X24_Y24_N4
--operation mode is arithmetic

D11L11 = AMPP_FUNCTION(Q1_q_b[0], D9_pipe[0][8]);


--D11_pipe[0][7] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][7] at LC_X24_Y27_N1
--operation mode is normal

D11_pipe[0][7] = AMPP_FUNCTION(clk, D9_pipe[0][7], VCC, GND);


--D11_pipe[0][6] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][6] at LC_X32_Y28_N4
--operation mode is normal

D11_pipe[0][6] = AMPP_FUNCTION(clk, D9_pipe[0][6], VCC);


--D11_pipe[0][5] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][5] at LC_X18_Y27_N2
--operation mode is normal

D11_pipe[0][5] = AMPP_FUNCTION(clk, D9_pipe[0][5], VCC);


--D11_pipe[0][4] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][4] at LC_X19_Y27_N2
--operation mode is normal

D11_pipe[0][4] = AMPP_FUNCTION(clk, D9_pipe[0][4], VCC, GND);


--D11_pipe[0][3] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][3] at LC_X22_Y27_N2
--operation mode is normal

D11_pipe[0][3] = AMPP_FUNCTION(clk, D9_pipe[0][3], VCC, GND);


--D11_pipe[0][2] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][2] at LC_X18_Y29_N5
--operation mode is normal

D11_pipe[0][2] = AMPP_FUNCTION(clk, D9_pipe[0][2], VCC);


--D11_pipe[0][1] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][1] at LC_X21_Y29_N1
--operation mode is normal

D11_pipe[0][1] = AMPP_FUNCTION(clk, D9_pipe[0][1], VCC);


--D11_pipe[0][0] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][0] at LC_X19_Y30_N6
--operation mode is normal

D11_pipe[0][0] = AMPP_FUNCTION(clk, D9_pipe[0][0], VCC);


--E1_done_early is fir321_st:fir321_st_inst|par_ctrl:Uctrl|done_early at LC_X33_Y1_N9
--operation mode is normal

E1_done_early = AMPP_FUNCTION(clk, E1L1, !rst);


--Q1_q_b[10] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|altsyncram_b5q:altsyncram4|q_b[10] at M512_X26_Y23
--RAM Block Operation Mode: Simple Dual-Port
--Port A Depth: 4, Port A Width: 11, Port B Depth: 4, Port B Width: 11
--Port A Logical Depth: 3, Port A Logical Width: 11, Port B Logical Depth: 3, Port B Logical Width: 11
--Port A Input: Registered, Port B Input: Registered, Port B Output: Registered
Q1_q_b[10] = AMPP_FUNCTION(GND, GND, clk, clk, X1_q_b[10], R1_safe_q[0], R1_safe_q[1], N1_dffe3a[0], N1L4, GND, GND, GND, GND, GND, GND, X1_q_b[9], X1_q_b[8], X1_q_b[7], X1_q_b[6], X1_q_b[5], X1_q_b[4], X1_q_b[3], X1_q_b[2], X1_q_b[1], X1_q_b[0]);

--Q1_q_b[0] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|altsyncram_b5q:altsyncram4|q_b[0] at M512_X26_Y23
Q1_q_b[0] = AMPP_FUNCTION(GND, GND, clk, clk, X1_q_b[10], R1_safe_q[0], R1_safe_q[1], N1_dffe3a[0], N1L4, GND, GND, GND, GND, GND, GND, X1_q_b[9], X1_q_b[8], X1_q_b[7], X1_q_b[6], X1_q_b[5], X1_q_b[4], X1_q_b[3], X1_q_b[2], X1_q_b[1], X1_q_b[0]);

--Q1_q_b[1] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|altsyncram_b5q:altsyncram4|q_b[1] at M512_X26_Y23
Q1_q_b[1] = AMPP_FUNCTION(GND, GND, clk, clk, X1_q_b[10], R1_safe_q[0], R1_safe_q[1], N1_dffe3a[0], N1L4, GND, GND, GND, GND, GND, GND, X1_q_b[9], X1_q_b[8], X1_q_b[7], X1_q_b[6], X1_q_b[5], X1_q_b[4], X1_q_b[3], X1_q_b[2], X1_q_b[1], X1_q_b[0]);

--Q1_q_b[2] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|altsyncram_b5q:altsyncram4|q_b[2] at M512_X26_Y23
Q1_q_b[2] = AMPP_FUNCTION(GND, GND, clk, clk, X1_q_b[10], R1_safe_q[0], R1_safe_q[1], N1_dffe3a[0], N1L4, GND, GND, GND, GND, GND, GND, X1_q_b[9], X1_q_b[8], X1_q_b[7], X1_q_b[6], X1_q_b[5], X1_q_b[4], X1_q_b[3], X1_q_b[2], X1_q_b[1], X1_q_b[0]);

--Q1_q_b[3] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|altsyncram_b5q:altsyncram4|q_b[3] at M512_X26_Y23
Q1_q_b[3] = AMPP_FUNCTION(GND, GND, clk, clk, X1_q_b[10], R1_safe_q[0], R1_safe_q[1], N1_dffe3a[0], N1L4, GND, GND, GND, GND, GND, GND, X1_q_b[9], X1_q_b[8], X1_q_b[7], X1_q_b[6], X1_q_b[5], X1_q_b[4], X1_q_b[3], X1_q_b[2], X1_q_b[1], X1_q_b[0]);

--Q1_q_b[4] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|altsyncram_b5q:altsyncram4|q_b[4] at M512_X26_Y23
Q1_q_b[4] = AMPP_FUNCTION(GND, GND, clk, clk, X1_q_b[10], R1_safe_q[0], R1_safe_q[1], N1_dffe3a[0], N1L4, GND, GND, GND, GND, GND, GND, X1_q_b[9], X1_q_b[8], X1_q_b[7], X1_q_b[6], X1_q_b[5], X1_q_b[4], X1_q_b[3], X1_q_b[2], X1_q_b[1], X1_q_b[0]);

--Q1_q_b[5] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|altsyncram_b5q:altsyncram4|q_b[5] at M512_X26_Y23
Q1_q_b[5] = AMPP_FUNCTION(GND, GND, clk, clk, X1_q_b[10], R1_safe_q[0], R1_safe_q[1], N1_dffe3a[0], N1L4, GND, GND, GND, GND, GND, GND, X1_q_b[9], X1_q_b[8], X1_q_b[7], X1_q_b[6], X1_q_b[5], X1_q_b[4], X1_q_b[3], X1_q_b[2], X1_q_b[1], X1_q_b[0]);

--Q1_q_b[6] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|altsyncram_b5q:altsyncram4|q_b[6] at M512_X26_Y23
Q1_q_b[6] = AMPP_FUNCTION(GND, GND, clk, clk, X1_q_b[10], R1_safe_q[0], R1_safe_q[1], N1_dffe3a[0], N1L4, GND, GND, GND, GND, GND, GND, X1_q_b[9], X1_q_b[8], X1_q_b[7], X1_q_b[6], X1_q_b[5], X1_q_b[4], X1_q_b[3], X1_q_b[2], X1_q_b[1], X1_q_b[0]);

--Q1_q_b[7] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|altsyncram_b5q:altsyncram4|q_b[7] at M512_X26_Y23
Q1_q_b[7] = AMPP_FUNCTION(GND, GND, clk, clk, X1_q_b[10], R1_safe_q[0], R1_safe_q[1], N1_dffe3a[0], N1L4, GND, GND, GND, GND, GND, GND, X1_q_b[9], X1_q_b[8], X1_q_b[7], X1_q_b[6], X1_q_b[5], X1_q_b[4], X1_q_b[3], X1_q_b[2], X1_q_b[1], X1_q_b[0]);

--Q1_q_b[8] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|altsyncram_b5q:altsyncram4|q_b[8] at M512_X26_Y23
Q1_q_b[8] = AMPP_FUNCTION(GND, GND, clk, clk, X1_q_b[10], R1_safe_q[0], R1_safe_q[1], N1_dffe3a[0], N1L4, GND, GND, GND, GND, GND, GND, X1_q_b[9], X1_q_b[8], X1_q_b[7], X1_q_b[6], X1_q_b[5], X1_q_b[4], X1_q_b[3], X1_q_b[2], X1_q_b[1], X1_q_b[0]);

--Q1_q_b[9] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|altsyncram_b5q:altsyncram4|q_b[9] at M512_X26_Y23
Q1_q_b[9] = AMPP_FUNCTION(GND, GND, clk, clk, X1_q_b[10], R1_safe_q[0], R1_safe_q[1], N1_dffe3a[0], N1L4, GND, GND, GND, GND, GND, GND, X1_q_b[9], X1_q_b[8], X1_q_b[7], X1_q_b[6], X1_q_b[5], X1_q_b[4], X1_q_b[3], X1_q_b[2], X1_q_b[1], X1_q_b[0]);


--D9_pipe[0][19] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][19] at LC_X24_Y26_N7
--operation mode is normal

D9_pipe[0][19] = AMPP_FUNCTION(clk, D7_pipe[0][19], D6_pipe[0][19], VCC, D9L14, D9L64, D9L74);


--D9_pipe[0][18] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][18] at LC_X24_Y26_N6
--operation mode is arithmetic

D9_pipe[0][18] = AMPP_FUNCTION(clk, D7_pipe[0][18], D6_pipe[0][19], VCC, D9L14, D9L34, D9L44);

--D9L64 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][18]~COUT at LC_X24_Y26_N6
--operation mode is arithmetic

D9L64 = AMPP_FUNCTION(D7_pipe[0][18], D6_pipe[0][19], D9L34);

--D9L74 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][18]~COUTCOUT1_62 at LC_X24_Y26_N6
--operation mode is arithmetic

D9L74 = AMPP_FUNCTION(D7_pipe[0][18], D6_pipe[0][19], D9L44);


--D9_pipe[0][17] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][17] at LC_X24_Y26_N5
--operation mode is arithmetic

D9_pipe[0][17] = AMPP_FUNCTION(clk, D7_pipe[0][17], D6_pipe[0][19], VCC, D9L14);

--D9L34 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][17]~COUT at LC_X24_Y26_N5
--operation mode is arithmetic

D9L34 = AMPP_FUNCTION(D7_pipe[0][17], D6_pipe[0][19]);

--D9L44 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][17]~COUTCOUT1_61 at LC_X24_Y26_N5
--operation mode is arithmetic

D9L44 = AMPP_FUNCTION(D7_pipe[0][17], D6_pipe[0][19]);


--D9_pipe[0][16] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][16] at LC_X24_Y26_N4
--operation mode is arithmetic

D9_pipe[0][16] = AMPP_FUNCTION(clk, D7_pipe[0][16], D6_pipe[0][19], VCC, D9L72, D9L83, D9L93);

--D9L14 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][16]~COUT at LC_X24_Y26_N4
--operation mode is arithmetic

D9L14 = AMPP_FUNCTION(D7_pipe[0][16], D6_pipe[0][19], D9L72, D9L83, D9L93);


--D9_pipe[0][15] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][15] at LC_X24_Y26_N3
--operation mode is arithmetic

D9_pipe[0][15] = AMPP_FUNCTION(clk, D7_pipe[0][15], D6_pipe[0][19], VCC, D9L72, D9L53, D9L63);

--D9L83 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][15]~COUT at LC_X24_Y26_N3
--operation mode is arithmetic

D9L83 = AMPP_FUNCTION(D7_pipe[0][15], D6_pipe[0][19], D9L53);

--D9L93 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][15]~COUTCOUT1_60 at LC_X24_Y26_N3
--operation mode is arithmetic

D9L93 = AMPP_FUNCTION(D7_pipe[0][15], D6_pipe[0][19], D9L63);


--D9_pipe[0][14] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][14] at LC_X24_Y26_N2
--operation mode is arithmetic

D9_pipe[0][14] = AMPP_FUNCTION(clk, D7_pipe[0][14], D6_pipe[0][14], VCC, D9L72, D9L23, D9L33);

--D9L53 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][14]~COUT at LC_X24_Y26_N2
--operation mode is arithmetic

D9L53 = AMPP_FUNCTION(D7_pipe[0][14], D6_pipe[0][14], D9L23);

--D9L63 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][14]~COUTCOUT1_59 at LC_X24_Y26_N2
--operation mode is arithmetic

D9L63 = AMPP_FUNCTION(D7_pipe[0][14], D6_pipe[0][14], D9L33);


--D9_pipe[0][13] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][13] at LC_X24_Y26_N1
--operation mode is arithmetic

D9_pipe[0][13] = AMPP_FUNCTION(clk, D6_pipe[0][13], D7_pipe[0][13], VCC, D9L72, D9L92, D9L03);

--D9L23 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][13]~COUT at LC_X24_Y26_N1
--operation mode is arithmetic

D9L23 = AMPP_FUNCTION(D6_pipe[0][13], D7_pipe[0][13], D9L92);

--D9L33 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][13]~COUTCOUT1_58 at LC_X24_Y26_N1
--operation mode is arithmetic

D9L33 = AMPP_FUNCTION(D6_pipe[0][13], D7_pipe[0][13], D9L03);


--D9_pipe[0][12] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][12] at LC_X24_Y26_N0
--operation mode is arithmetic

D9_pipe[0][12] = AMPP_FUNCTION(clk, D7_pipe[0][12], D6_pipe[0][12], VCC, D9L72);

--D9L92 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][12]~COUT at LC_X24_Y26_N0
--operation mode is arithmetic

D9L92 = AMPP_FUNCTION(D7_pipe[0][12], D6_pipe[0][12]);

--D9L03 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][12]~COUTCOUT1_57 at LC_X24_Y26_N0
--operation mode is arithmetic

D9L03 = AMPP_FUNCTION(D7_pipe[0][12], D6_pipe[0][12]);


--D9_pipe[0][11] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][11] at LC_X24_Y27_N9
--operation mode is arithmetic

D9_pipe[0][11] = AMPP_FUNCTION(clk, D6_pipe[0][11], D7_pipe[0][11], VCC, D9L31, D9L42, D9L52);

--D9L72 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][11]~COUT at LC_X24_Y27_N9
--operation mode is arithmetic

D9L72 = AMPP_FUNCTION(D6_pipe[0][11], D7_pipe[0][11], D9L31, D9L42, D9L52);


--D9_pipe[0][10] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][10] at LC_X24_Y27_N8
--operation mode is arithmetic

D9_pipe[0][10] = AMPP_FUNCTION(clk, D7_pipe[0][10], D6_pipe[0][10], VCC, D9L31, D9L12, D9L22);

--D9L42 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][10]~COUT at LC_X24_Y27_N8
--operation mode is arithmetic

D9L42 = AMPP_FUNCTION(D7_pipe[0][10], D6_pipe[0][10], D9L12);

--D9L52 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][10]~COUTCOUT1_56 at LC_X24_Y27_N8
--operation mode is arithmetic

D9L52 = AMPP_FUNCTION(D7_pipe[0][10], D6_pipe[0][10], D9L22);


--D9_pipe[0][9] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][9] at LC_X24_Y27_N7
--operation mode is arithmetic

D9_pipe[0][9] = AMPP_FUNCTION(clk, D6_pipe[0][9], D7_pipe[0][9], VCC, D9L31, D9L81, D9L91);

--D9L12 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][9]~COUT at LC_X24_Y27_N7
--operation mode is arithmetic

D9L12 = AMPP_FUNCTION(D6_pipe[0][9], D7_pipe[0][9], D9L81);

--D9L22 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][9]~COUTCOUT1_55 at LC_X24_Y27_N7
--operation mode is arithmetic

D9L22 = AMPP_FUNCTION(D6_pipe[0][9], D7_pipe[0][9], D9L91);


--D9_pipe[0][8] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][8] at LC_X24_Y27_N6
--operation mode is arithmetic

D9_pipe[0][8] = AMPP_FUNCTION(clk, D7_pipe[0][8], D6_pipe[0][8], VCC, D9L31, D9L51, D9L61);

--D9L81 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][8]~COUT at LC_X24_Y27_N6
--operation mode is arithmetic

D9L81 = AMPP_FUNCTION(D7_pipe[0][8], D6_pipe[0][8], D9L51);

--D9L91 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][8]~COUTCOUT1_54 at LC_X24_Y27_N6
--operation mode is arithmetic

D9L91 = AMPP_FUNCTION(D7_pipe[0][8], D6_pipe[0][8], D9L61);


--D9_pipe[0][7] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][7] at LC_X24_Y27_N5
--operation mode is arithmetic

D9_pipe[0][7] = AMPP_FUNCTION(clk, D7_pipe[0][7], D6_pipe[0][7], VCC, D9L31);

--D9L51 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][7]~COUT at LC_X24_Y27_N5
--operation mode is arithmetic

D9L51 = AMPP_FUNCTION(D7_pipe[0][7], D6_pipe[0][7]);

--D9L61 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][7]~COUTCOUT1_53 at LC_X24_Y27_N5
--operation mode is arithmetic

D9L61 = AMPP_FUNCTION(D7_pipe[0][7], D6_pipe[0][7]);


--D9_pipe[0][6] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][6] at LC_X24_Y27_N4
--operation mode is arithmetic

D9_pipe[0][6] = AMPP_FUNCTION(clk, D7_pipe[0][6], D6_pipe[0][6], VCC, D9L01, D9L11);

--D9L31 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][6]~COUT at LC_X24_Y27_N4
--operation mode is arithmetic