fir321.map.eqn

来自「vhdl source,ver-fir-coefficient,simulink」· EQN 代码 · 共 1,690 行 · 第 1/5 页

D6L31 = AMPP_FUNCTION(D2_pipe[0][6], D1_pipe[0][6], D6L11);


--D7_pipe[0][5] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_1_n_1_n|pipe[0][5]
--operation mode is normal

D7_pipe[0][5] = AMPP_FUNCTION(clk, D3_pipe[0][5], VCC);


--D6_pipe[0][5] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_1_n_0_n|pipe[0][5]
--operation mode is arithmetic

D6_pipe[0][5] = AMPP_FUNCTION(clk, D2_pipe[0][5], D1_pipe[0][5], VCC, D6L9);

--D6L11 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_1_n_0_n|pipe[0][5]~COUT
--operation mode is arithmetic

D6L11 = AMPP_FUNCTION(D2_pipe[0][5], D1_pipe[0][5], D6L9);


--D7_pipe[0][4] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_1_n_1_n|pipe[0][4]
--operation mode is normal

D7_pipe[0][4] = AMPP_FUNCTION(clk, D3_pipe[0][4], VCC);


--D6_pipe[0][4] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_1_n_0_n|pipe[0][4]
--operation mode is arithmetic

D6_pipe[0][4] = AMPP_FUNCTION(clk, D2_pipe[0][4], D1_pipe[0][4], VCC, D6L7);

--D6L9 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_1_n_0_n|pipe[0][4]~COUT
--operation mode is arithmetic

D6L9 = AMPP_FUNCTION(D2_pipe[0][4], D1_pipe[0][4], D6L7);


--D6_pipe[0][3] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_1_n_0_n|pipe[0][3]
--operation mode is arithmetic

D6_pipe[0][3] = AMPP_FUNCTION(clk, D2_pipe[0][3], D1_pipe[0][3], VCC, D6L5);

--D6L7 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_1_n_0_n|pipe[0][3]~COUT
--operation mode is arithmetic

D6L7 = AMPP_FUNCTION(D2_pipe[0][3], D1_pipe[0][3], D6L5);


--D6_pipe[0][2] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_1_n_0_n|pipe[0][2]
--operation mode is arithmetic

D6_pipe[0][2] = AMPP_FUNCTION(clk, D2_pipe[0][2], D1_pipe[0][2], VCC);

--D6L5 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_1_n_0_n|pipe[0][2]~COUT
--operation mode is arithmetic

D6L5 = AMPP_FUNCTION(D2_pipe[0][2], D1_pipe[0][2]);


--D6_pipe[0][1] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_1_n_0_n|pipe[0][1]
--operation mode is normal

D6_pipe[0][1] = AMPP_FUNCTION(clk, D1_pipe[0][1], VCC);


--D6_pipe[0][0] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_1_n_0_n|pipe[0][0]
--operation mode is normal

D6_pipe[0][0] = AMPP_FUNCTION(clk, D1_pipe[0][0], VCC);


--L1_shift_reg[0] is fir321_st:fir321_st_inst|ser_shift:we_shift|shift_reg[0]
--operation mode is normal

L1_shift_reg[0] = AMPP_FUNCTION(coef_in_clk, coef_we, L1_shift_reg[1], L1_shift_reg[0], J1_cnt_done, VCC);


--K1_coef_in_inv[10] is fir321_st:fir321_st_inst|coef_in_conv:coef_conv|coef_in_inv[10]
--operation mode is normal

K1_coef_in_inv[10] = AMPP_FUNCTION(coef_in_clk, coef_in[10], VCC, K1L13);


--J1_cnt_out[0] is fir321_st:fir321_st_inst|addr_cnt_up:addr_cnt|cnt_out[0]
--operation mode is arithmetic

J1_cnt_out[0] = AMPP_FUNCTION(coef_in_clk, J1_cnt_out[0], ~GND, VCC, J1L5);

--J1L6 is fir321_st:fir321_st_inst|addr_cnt_up:addr_cnt|cnt_out[0]~COUT
--operation mode is arithmetic

J1L6 = AMPP_FUNCTION(J1_cnt_out[0]);


--J1_cnt_out[1] is fir321_st:fir321_st_inst|addr_cnt_up:addr_cnt|cnt_out[1]
--operation mode is arithmetic

J1_cnt_out[1] = AMPP_FUNCTION(coef_in_clk, J1_cnt_out[1], A1L61, VCC, J1L5, J1L6);

--J1L8 is fir321_st:fir321_st_inst|addr_cnt_up:addr_cnt|cnt_out[1]~COUT
--operation mode is arithmetic

J1L8 = AMPP_FUNCTION(J1_cnt_out[1], J1L6);


--J1_cnt_out[2] is fir321_st:fir321_st_inst|addr_cnt_up:addr_cnt|cnt_out[2]
--operation mode is arithmetic

J1_cnt_out[2] = AMPP_FUNCTION(coef_in_clk, J1_cnt_out[2], A1L61, VCC, J1L5, J1L8);

--J1L01 is fir321_st:fir321_st_inst|addr_cnt_up:addr_cnt|cnt_out[2]~COUT
--operation mode is arithmetic

J1L01 = AMPP_FUNCTION(J1_cnt_out[2], J1L8);


--J1_cnt_out[3] is fir321_st:fir321_st_inst|addr_cnt_up:addr_cnt|cnt_out[3]
--operation mode is arithmetic

J1_cnt_out[3] = AMPP_FUNCTION(coef_in_clk, J1_cnt_out[3], A1L61, VCC, J1L5, J1L01);

--J1L21 is fir321_st:fir321_st_inst|addr_cnt_up:addr_cnt|cnt_out[3]~COUT
--operation mode is arithmetic

J1L21 = AMPP_FUNCTION(J1_cnt_out[3], J1L01);


--J1_cnt_out[4] is fir321_st:fir321_st_inst|addr_cnt_up:addr_cnt|cnt_out[4]
--operation mode is normal

J1_cnt_out[4] = AMPP_FUNCTION(coef_in_clk, J1_cnt_out[4], A1L61, VCC, J1L5, J1L21);


--C1_res[8] is fir321_st:fir321_st_inst|sadd:U_0_sym_add|res[8]
--operation mode is normal

C1_res[8] = AMPP_FUNCTION(clk, H01_data_out[7], H1_data_out[7], VCC, C1L71);


--C2_res[8] is fir321_st:fir321_st_inst|sadd:U_1_sym_add|res[8]
--operation mode is normal

C2_res[8] = AMPP_FUNCTION(clk, H9_data_out[7], H2_data_out[7], VCC, C2L71);


--C3_res[8] is fir321_st:fir321_st_inst|sadd:U_2_sym_add|res[8]
--operation mode is normal

C3_res[8] = AMPP_FUNCTION(clk, H8_data_out[7], H3_data_out[7], VCC, C3L71);


--C4_res[8] is fir321_st:fir321_st_inst|sadd:U_3_sym_add|res[8]
--operation mode is normal

C4_res[8] = AMPP_FUNCTION(clk, H7_data_out[7], H4_data_out[7], VCC, C4L71);


--C5_res[8] is fir321_st:fir321_st_inst|sadd:U_4_sym_add|res[8]
--operation mode is normal

C5_res[8] = AMPP_FUNCTION(clk, H6_data_out[7], H5_data_out[7], VCC, C5L71);


--R1_modulus_trigger is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|cntr_2gc:cntr1|modulus_trigger
--operation mode is normal

R1_modulus_trigger = AMPP_FUNCTION(R1L1, R1L5);


--D4_pipe[0][18] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_3_n|pipe[0][18]
--operation mode is normal

D4_pipe[0][18] = AMPP_FUNCTION(clk, W8_q_b[10], W7_q_b[10], VCC, D4L42);


--D3_pipe[0][18] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_2_n|pipe[0][18]
--operation mode is normal

D3_pipe[0][18] = AMPP_FUNCTION(clk, W6_q_b[10], W5_q_b[10], VCC, D3L42);


--D2_pipe[0][18] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_1_n|pipe[0][18]
--operation mode is normal

D2_pipe[0][18] = AMPP_FUNCTION(clk, W4_q_b[10], W3_q_b[10], VCC, D2L42);


--D1_pipe[0][18] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_0_n|pipe[0][18]
--operation mode is normal

D1_pipe[0][18] = AMPP_FUNCTION(clk, W2_q_b[10], W1_q_b[10], VCC, D1L42);


--K1_coef_in_inv[9] is fir321_st:fir321_st_inst|coef_in_conv:coef_conv|coef_in_inv[9]
--operation mode is arithmetic

K1_coef_in_inv[9] = AMPP_FUNCTION(coef_in_clk, coef_in[9], VCC, K1L92);

--K1L13 is fir321_st:fir321_st_inst|coef_in_conv:coef_conv|coef_in_inv[9]~COUT
--operation mode is arithmetic

K1L13 = AMPP_FUNCTION(coef_in[9], K1L92);


--D4_pipe[0][17] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_3_n|pipe[0][17]
--operation mode is arithmetic

D4_pipe[0][17] = AMPP_FUNCTION(clk, W8_q_b[10], W7_q_b[10], VCC, D4L22);

--D4L42 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_3_n|pipe[0][17]~COUT
--operation mode is arithmetic

D4L42 = AMPP_FUNCTION(W8_q_b[10], W7_q_b[10], D4L22);


--K1_coef_in_inv[8] is fir321_st:fir321_st_inst|coef_in_conv:coef_conv|coef_in_inv[8]
--operation mode is arithmetic

K1_coef_in_inv[8] = AMPP_FUNCTION(coef_in_clk, coef_in[8], VCC, K1L72);

--K1L92 is fir321_st:fir321_st_inst|coef_in_conv:coef_conv|coef_in_inv[8]~COUT
--operation mode is arithmetic

K1L92 = AMPP_FUNCTION(coef_in[8], K1L72);


--D4_pipe[0][16] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_3_n|pipe[0][16]
--operation mode is arithmetic

D4_pipe[0][16] = AMPP_FUNCTION(clk, W8_q_b[9], W7_q_b[10], VCC, D4L02);

--D4L22 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_3_n|pipe[0][16]~COUT
--operation mode is arithmetic

D4L22 = AMPP_FUNCTION(W8_q_b[9], W7_q_b[10], D4L02);


--K1_coef_in_inv[7] is fir321_st:fir321_st_inst|coef_in_conv:coef_conv|coef_in_inv[7]
--operation mode is arithmetic

K1_coef_in_inv[7] = AMPP_FUNCTION(coef_in_clk, coef_in[7], VCC, K1L52);

--K1L72 is fir321_st:fir321_st_inst|coef_in_conv:coef_conv|coef_in_inv[7]~COUT
--operation mode is arithmetic

K1L72 = AMPP_FUNCTION(coef_in[7], K1L52);


--D4_pipe[0][15] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_3_n|pipe[0][15]
--operation mode is arithmetic

D4_pipe[0][15] = AMPP_FUNCTION(clk, W8_q_b[8], W7_q_b[9], VCC, D4L81);

--D4L02 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_3_n|pipe[0][15]~COUT
--operation mode is arithmetic

D4L02 = AMPP_FUNCTION(W8_q_b[8], W7_q_b[9], D4L81);


--D3_pipe[0][15] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_2_n|pipe[0][15]
--operation mode is arithmetic

D3_pipe[0][15] = AMPP_FUNCTION(clk, W6_q_b[10], W5_q_b[10], VCC, D3L22);

--D3L42 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_2_n|pipe[0][15]~COUT
--operation mode is arithmetic

D3L42 = AMPP_FUNCTION(W6_q_b[10], W5_q_b[10], D3L22);


--K1_coef_in_inv[6] is fir321_st:fir321_st_inst|coef_in_conv:coef_conv|coef_in_inv[6]
--operation mode is arithmetic

K1_coef_in_inv[6] = AMPP_FUNCTION(coef_in_clk, coef_in[6], VCC, K1L32);

--K1L52 is fir321_st:fir321_st_inst|coef_in_conv:coef_conv|coef_in_inv[6]~COUT
--operation mode is arithmetic

K1L52 = AMPP_FUNCTION(coef_in[6], K1L32);


--D4_pipe[0][14] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_3_n|pipe[0][14]
--operation mode is arithmetic

D4_pipe[0][14] = AMPP_FUNCTION(clk, W8_q_b[7], W7_q_b[8], VCC, D4L61);

--D4L81 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_3_n|pipe[0][14]~COUT
--operation mode is arithmetic

D4L81 = AMPP_FUNCTION(W8_q_b[7], W7_q_b[8], D4L61);


--D3_pipe[0][14] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_2_n|pipe[0][14]
--operation mode is arithmetic

D3_pipe[0][14] = AMPP_FUNCTION(clk, W6_q_b[9], W5_q_b[10], VCC, D3L02);

--D3L22 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_2_n|pipe[0][14]~COUT
--operation mode is arithmetic

D3L22 = AMPP_FUNCTION(W6_q_b[9], W5_q_b[10], D3L02);


--K1_coef_in_inv[5] is fir321_st:fir321_st_inst|coef_in_conv:coef_conv|coef_in_inv[5]
--operation mode is arithmetic

K1_coef_in_inv[5] = AMPP_FUNCTION(coef_in_clk, coef_in[5], VCC, K1L12);

--K1L32 is fir321_st:fir321_st_inst|coef_in_conv:coef_conv|coef_in_inv[5]~COUT
--operation mode is arithmetic

K1L32 = AMPP_FUNCTION(coef_in[5], K1L12);


--D4_pipe[0][13] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_3_n|pipe[0][13]
--operation mode is arithmetic

D4_pipe[0][13] = AMPP_FUNCTION(clk, W8_q_b[6], W7_q_b[7], VCC, D4L41);

--D4L61 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_3_n|pipe[0][13]~COUT
--operation mode is arithmetic

D4L61 = AMPP_FUNCTION(W8_q_b[6], W7_q_b[7], D4L41);


--D3_pipe[0][13] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_2_n|pipe[0][13]
--operation mode is arithmetic

D3_pipe[0][13] = AMPP_FUNCTION(clk, W6_q_b[8], W5_q_b[9], VCC, D3L81);

--D3L02 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_2_n|pipe[0][13]~COUT
--operation mode is arithmetic

D3L02 = AMPP_FUNCTION(W6_q_b[8], W5_q_b[9], D3L81);


--D2_pipe[0][13] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_1_n|pipe[0][13]
--operation mode is arithmetic