fir321.map.eqn

来自「vhdl source,ver-fir-coefficient,simulink」· EQN 代码 · 共 1,690 行 · 第 1/5 页

--D21_pipe[0][19] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][19]
--operation mode is normal

D21_pipe[0][19] = AMPP_FUNCTION(clk, D11_pipe[0][19], VCC);


--D21_pipe[0][18] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][18]
--operation mode is normal

D21_pipe[0][18] = AMPP_FUNCTION(clk, D11_pipe[0][18], VCC);


--D21_pipe[0][17] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][17]
--operation mode is normal

D21_pipe[0][17] = AMPP_FUNCTION(clk, D11_pipe[0][17], VCC);


--D21_pipe[0][16] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][16]
--operation mode is normal

D21_pipe[0][16] = AMPP_FUNCTION(clk, D11_pipe[0][16], VCC);


--D21_pipe[0][15] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][15]
--operation mode is normal

D21_pipe[0][15] = AMPP_FUNCTION(clk, D11_pipe[0][15], VCC);


--D21_pipe[0][14] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][14]
--operation mode is normal

D21_pipe[0][14] = AMPP_FUNCTION(clk, D11_pipe[0][14], VCC);


--D21_pipe[0][13] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][13]
--operation mode is normal

D21_pipe[0][13] = AMPP_FUNCTION(clk, D11_pipe[0][13], VCC);


--D21_pipe[0][12] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][12]
--operation mode is normal

D21_pipe[0][12] = AMPP_FUNCTION(clk, D11_pipe[0][12], VCC);


--D21_pipe[0][11] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][11]
--operation mode is normal

D21_pipe[0][11] = AMPP_FUNCTION(clk, D11_pipe[0][11], VCC);


--D21_pipe[0][10] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][10]
--operation mode is normal

D21_pipe[0][10] = AMPP_FUNCTION(clk, D11_pipe[0][10], VCC);


--D21_pipe[0][9] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][9]
--operation mode is normal

D21_pipe[0][9] = AMPP_FUNCTION(clk, D11_pipe[0][9], VCC);


--D21_pipe[0][8] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][8]
--operation mode is normal

D21_pipe[0][8] = AMPP_FUNCTION(clk, D11_pipe[0][8], VCC);


--D21_pipe[0][7] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][7]
--operation mode is normal

D21_pipe[0][7] = AMPP_FUNCTION(clk, D11_pipe[0][7], VCC);


--D21_pipe[0][6] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][6]
--operation mode is normal

D21_pipe[0][6] = AMPP_FUNCTION(clk, D11_pipe[0][6], VCC);


--D21_pipe[0][5] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][5]
--operation mode is normal

D21_pipe[0][5] = AMPP_FUNCTION(clk, D11_pipe[0][5], VCC);


--D21_pipe[0][4] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][4]
--operation mode is normal

D21_pipe[0][4] = AMPP_FUNCTION(clk, D11_pipe[0][4], VCC);


--D21_pipe[0][3] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][3]
--operation mode is normal

D21_pipe[0][3] = AMPP_FUNCTION(clk, D11_pipe[0][3], VCC);


--D21_pipe[0][2] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][2]
--operation mode is normal

D21_pipe[0][2] = AMPP_FUNCTION(clk, D11_pipe[0][2], VCC);


--D21_pipe[0][1] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][1]
--operation mode is normal

D21_pipe[0][1] = AMPP_FUNCTION(clk, D11_pipe[0][1], VCC);


--D21_pipe[0][0] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_cen_l_0_n_0_n|pipe[0][0]
--operation mode is normal

D21_pipe[0][0] = AMPP_FUNCTION(clk, D11_pipe[0][0], VCC);


--E1_done is fir321_st:fir321_st_inst|par_ctrl:Uctrl|done
--operation mode is normal

E1_done = AMPP_FUNCTION(clk, E1_done_early, !rst);


--E1_rdy_to_ld is fir321_st:fir321_st_inst|par_ctrl:Uctrl|rdy_to_ld
--operation mode is normal

E1_rdy_to_ld = AMPP_FUNCTION(clk, !rst);


--D11_pipe[0][19] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][19]
--operation mode is normal

D11_pipe[0][19] = AMPP_FUNCTION(clk, Q1_q_b[10], D9_pipe[0][19], VCC, D11L13);


--D11_pipe[0][18] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][18]
--operation mode is arithmetic

D11_pipe[0][18] = AMPP_FUNCTION(clk, Q1_q_b[10], D9_pipe[0][18], VCC, D11L92);

--D11L13 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][18]~COUT
--operation mode is arithmetic

D11L13 = AMPP_FUNCTION(Q1_q_b[10], D9_pipe[0][18], D11L92);


--D11_pipe[0][17] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][17]
--operation mode is arithmetic

D11_pipe[0][17] = AMPP_FUNCTION(clk, Q1_q_b[9], D9_pipe[0][17], VCC, D11L72);

--D11L92 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][17]~COUT
--operation mode is arithmetic

D11L92 = AMPP_FUNCTION(Q1_q_b[9], D9_pipe[0][17], D11L72);


--D11_pipe[0][16] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][16]
--operation mode is arithmetic

D11_pipe[0][16] = AMPP_FUNCTION(clk, Q1_q_b[8], D9_pipe[0][16], VCC, D11L52);

--D11L72 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][16]~COUT
--operation mode is arithmetic

D11L72 = AMPP_FUNCTION(Q1_q_b[8], D9_pipe[0][16], D11L52);


--D11_pipe[0][15] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][15]
--operation mode is arithmetic

D11_pipe[0][15] = AMPP_FUNCTION(clk, Q1_q_b[7], D9_pipe[0][15], VCC, D11L32);

--D11L52 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][15]~COUT
--operation mode is arithmetic

D11L52 = AMPP_FUNCTION(Q1_q_b[7], D9_pipe[0][15], D11L32);


--D11_pipe[0][14] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][14]
--operation mode is arithmetic

D11_pipe[0][14] = AMPP_FUNCTION(clk, Q1_q_b[6], D9_pipe[0][14], VCC, D11L12);

--D11L32 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][14]~COUT
--operation mode is arithmetic

D11L32 = AMPP_FUNCTION(Q1_q_b[6], D9_pipe[0][14], D11L12);


--D11_pipe[0][13] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][13]
--operation mode is arithmetic

D11_pipe[0][13] = AMPP_FUNCTION(clk, Q1_q_b[5], D9_pipe[0][13], VCC, D11L91);

--D11L12 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][13]~COUT
--operation mode is arithmetic

D11L12 = AMPP_FUNCTION(Q1_q_b[5], D9_pipe[0][13], D11L91);


--D11_pipe[0][12] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][12]
--operation mode is arithmetic

D11_pipe[0][12] = AMPP_FUNCTION(clk, Q1_q_b[4], D9_pipe[0][12], VCC, D11L71);

--D11L91 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][12]~COUT
--operation mode is arithmetic

D11L91 = AMPP_FUNCTION(Q1_q_b[4], D9_pipe[0][12], D11L71);


--D11_pipe[0][11] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][11]
--operation mode is arithmetic

D11_pipe[0][11] = AMPP_FUNCTION(clk, Q1_q_b[3], D9_pipe[0][11], VCC, D11L51);

--D11L71 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][11]~COUT
--operation mode is arithmetic

D11L71 = AMPP_FUNCTION(Q1_q_b[3], D9_pipe[0][11], D11L51);


--D11_pipe[0][10] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][10]
--operation mode is arithmetic

D11_pipe[0][10] = AMPP_FUNCTION(clk, Q1_q_b[2], D9_pipe[0][10], VCC, D11L31);

--D11L51 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][10]~COUT
--operation mode is arithmetic

D11L51 = AMPP_FUNCTION(Q1_q_b[2], D9_pipe[0][10], D11L31);


--D11_pipe[0][9] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][9]
--operation mode is arithmetic

D11_pipe[0][9] = AMPP_FUNCTION(clk, Q1_q_b[1], D9_pipe[0][9], VCC, D11L11);

--D11L31 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][9]~COUT
--operation mode is arithmetic

D11L31 = AMPP_FUNCTION(Q1_q_b[1], D9_pipe[0][9], D11L11);


--D11_pipe[0][8] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][8]
--operation mode is arithmetic

D11_pipe[0][8] = AMPP_FUNCTION(clk, Q1_q_b[0], D9_pipe[0][8], VCC);

--D11L11 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][8]~COUT
--operation mode is arithmetic

D11L11 = AMPP_FUNCTION(Q1_q_b[0], D9_pipe[0][8]);


--D11_pipe[0][7] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][7]
--operation mode is normal

D11_pipe[0][7] = AMPP_FUNCTION(clk, D9_pipe[0][7], VCC);


--D11_pipe[0][6] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][6]
--operation mode is normal

D11_pipe[0][6] = AMPP_FUNCTION(clk, D9_pipe[0][6], VCC);


--D11_pipe[0][5] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][5]
--operation mode is normal

D11_pipe[0][5] = AMPP_FUNCTION(clk, D9_pipe[0][5], VCC);


--D11_pipe[0][4] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][4]
--operation mode is normal

D11_pipe[0][4] = AMPP_FUNCTION(clk, D9_pipe[0][4], VCC);


--D11_pipe[0][3] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][3]
--operation mode is normal

D11_pipe[0][3] = AMPP_FUNCTION(clk, D9_pipe[0][3], VCC);


--D11_pipe[0][2] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][2]
--operation mode is normal

D11_pipe[0][2] = AMPP_FUNCTION(clk, D9_pipe[0][2], VCC);


--D11_pipe[0][1] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][1]
--operation mode is normal

D11_pipe[0][1] = AMPP_FUNCTION(clk, D9_pipe[0][1], VCC);


--D11_pipe[0][0] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_3_n_0_n|pipe[0][0]
--operation mode is normal

D11_pipe[0][0] = AMPP_FUNCTION(clk, D9_pipe[0][0], VCC);


--E1_done_early is fir321_st:fir321_st_inst|par_ctrl:Uctrl|done_early
--operation mode is normal

E1_done_early = AMPP_FUNCTION(clk, E1L1, !rst);


--Q1_q_b[10] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_0_n_4_n|altshift_taps:pipe_rtl_1|shift_taps_3lg:auto_generated|altsyncram_b5q:altsyncram4|q_b[10]
--RAM Block Operation Mode: Simple Dual-Port
--Port A Depth: 3, Port A Width: 1, Port B Depth: 3, Port B Width: 1
--Port A Logical Depth: 3, Port A Logical Width: 11, Port B Logical Depth: 3, Port B Logical Width: 11
--Port A Input: Registered, Port B Input: Registered, Port B Output: Registered
Q1_q_b[10] = AMPP_FUNCTION(GND, GND, clk, clk, X1_q_b[10], R1_safe_q[0], R1_safe_q[1], N1_dffe3a[0], N1L4);


--D9_pipe[0][19] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][19]
--operation mode is normal

D9_pipe[0][19] = AMPP_FUNCTION(clk, D7_pipe[0][19], D6_pipe[0][19], VCC, D9L53);


--D9_pipe[0][18] is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][18]
--operation mode is arithmetic

D9_pipe[0][18] = AMPP_FUNCTION(clk, D7_pipe[0][18], D6_pipe[0][19], VCC, D9L33);

--D9L53 is fir321_st:fir321_st_inst|sadd_lpm_cen:Uadd_0_lut_l_2_n_0_n|pipe[0][18]~COUT
--operation mode is arithmetic

D9L53 = AMPP_FUNCTION(D7_pipe[0][18], D6_pipe[0][19], D9L33);