fir321.tan.rpt

来自「vhdl source,ver-fir-coefficient,simulink」· RPT 代码 · 共 199 行 · 第 1/5 页

; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg4               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[1]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg0               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[0]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg1               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[0]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg2               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[0]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg3               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[0]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg4               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[0]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg0               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[10]               ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg1               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[10]               ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg2               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[10]               ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg3               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[10]               ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg4               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_0_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[10]               ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg0               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[9]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg1               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[9]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg2               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[9]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg3               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[9]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg4               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[9]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg0               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[8]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg1               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[8]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg2               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[8]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg3               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[8]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg4               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[8]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg0               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[7]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg1               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[7]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg2               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[7]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg3               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[7]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg4               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[7]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg0               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[6]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg1               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[6]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg2               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[6]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg3               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[6]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg4               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[6]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg0               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[5]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg1               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[5]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg2               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[5]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg3               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[5]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg4               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[5]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg0               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[4]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg1               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[4]                ; clk        ; clk      ; None                        ; None                      ; 2.509 ns                ;
; N/A                                     ; 317.76 MHz ( period = 3.147 ns )                    ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|ram_block1a10~portb_address_reg2               ; fir321_st:fir321_st_inst|ram_lut:Ur0_n_1_pp|ram_2pt_var_cen:ram|altsyncram:altsyncram_component|altsyncram_1jf1:auto_generated|q_b[4]                ; clk        ; clk