at91sam9263.rdf

来自「最新版IAR FOR ARM（EWARM）5.11中的代码例子」· RDF 代码 · 共 1,539 行 · 第 1/5 页

# ----------------------------------------------------------------------------
#          ATMEL Microcontroller Software Support  -  ROUSSET  -
# ----------------------------------------------------------------------------
#  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
#  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
#  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
#  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
#  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
#  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
#  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
#  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
#  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
# ----------------------------------------------------------------------------
# File Name           : AT91SAM9263.h
# Object              : AT91SAM9263 definitions
# Generated           : AT91 SW Application Group  12/07/2006 (13:13:32)
# 
# CVS Reference       : /AT91SAM9263.pl/1.2/Fri Nov 10 12:56:00 2006//
# CVS Reference       : /SYS_SAM9262.pl/1.4/Tue Jan 18 17:06:33 2005//
# CVS Reference       : /HMATRIX1_SAM9262.pl/1.10/Thu Oct 13 12:44:26 2005//
# CVS Reference       : /CCR_SAM9262.pl/1.7/Fri Nov 10 13:23:00 2006//
# CVS Reference       : /PMC_SAM9262.pl/1.4/Mon Mar  7 18:03:13 2005//
# CVS Reference       : /HSDRAMC1_6100A.pl/1.2/Mon Aug  9 10:52:25 2004//
# CVS Reference       : /HSMC3_6105A.pl/1.4/Tue Nov 16 09:16:23 2004//
# CVS Reference       : /AIC_6075B.pl/1.3/Fri May 20 14:21:42 2005//
# CVS Reference       : /PDC_6074C.pl/1.2/Thu Feb  3 09:02:11 2005//
# CVS Reference       : /DBGU_6059D.pl/1.1/Mon Jan 31 13:54:41 2005//
# CVS Reference       : /PIO_6057A.pl/1.2/Thu Feb  3 10:29:42 2005//
# CVS Reference       : /RSTC_6098A.pl/1.3/Thu Nov  4 13:57:00 2004//
# CVS Reference       : /SHDWC_6122A.pl/1.3/Wed Oct  6 14:16:58 2004//
# CVS Reference       : /RTTC_6081A.pl/1.2/Thu Nov  4 13:57:22 2004//
# CVS Reference       : /PITC_6079A.pl/1.2/Thu Nov  4 13:56:22 2004//
# CVS Reference       : /WDTC_6080A.pl/1.3/Thu Nov  4 13:58:52 2004//
# CVS Reference       : /TC_6082A.pl/1.7/Wed Mar  9 16:31:51 2005//
# CVS Reference       : /MCI_6101E.pl/1.1/Fri Jun  3 13:20:23 2005//
# CVS Reference       : /TWI_6061A.pl/1.2/Wed Oct 25 15:03:34 2006//
# CVS Reference       : /US_6089C.pl/1.1/Mon Jan 31 13:56:02 2005//
# CVS Reference       : /SSC_6078B.pl/1.1/Wed Jul 13 15:25:46 2005//
# CVS Reference       : /SPI_6088D.pl/1.3/Fri May 20 14:23:02 2005//
# CVS Reference       : /AC97C_XXXX.pl/1.3/Tue Feb 22 17:08:27 2005//
# CVS Reference       : /CAN_6019B.pl/1.1/Mon Jan 31 13:54:30 2005//
# CVS Reference       : /PWM_6044D.pl/1.2/Tue May 10 12:39:09 2005//
# CVS Reference       : /LCDC_6063A.pl/1.3/Fri Dec  9 10:59:26 2005//
# CVS Reference       : /EMACB_6119A.pl/1.6/Wed Jul 13 15:25:00 2005//
# CVS Reference       : /DMA_XXXX.pl/1.6/Tue Jan 11 09:40:44 2005//
# CVS Reference       : /UDP_6ept_puon.pl/1.1/Wed Aug 30 14:20:53 2006//
# CVS Reference       : /UHP_6127A.pl/1.1/Wed Feb 23 16:03:17 2005//
# CVS Reference       : /TBOX_XXXX.pl/1.15/Thu Jun  9 07:05:57 2005//
# CVS Reference       : /EBI_nadia2.pl/1.1/Wed Dec 29 11:28:03 2004//
# CVS Reference       : /HECC_6143A.pl/1.1/Wed Feb  9 17:16:57 2005//
# CVS Reference       : /ISI_xxxxx.pl/1.3/Thu Mar  3 11:11:48 2005//
# ----------------------------------------------------------------------------

rdf.version=1

~sysinclude=arm_default.rdf
~sysinclude=arm_status.rdf
# ========== Register definition for SYS peripheral ========== 
AT91C_SYS_ECC1.name="AT91C_SYS_ECC1"
AT91C_SYS_ECC1.description="ECC 0"
AT91C_SYS_ECC1.helpkey="ECC 0"
AT91C_SYS_ECC1.access=memorymapped
AT91C_SYS_ECC1.address=0xFFFFE600
AT91C_SYS_ECC1.width=32
AT91C_SYS_ECC1.byteEndian=little
AT91C_SYS_ECC0.name="AT91C_SYS_ECC0"
AT91C_SYS_ECC0.description="ECC 0"
AT91C_SYS_ECC0.helpkey="ECC 0"
AT91C_SYS_ECC0.access=memorymapped
AT91C_SYS_ECC0.address=0xFFFFE000
AT91C_SYS_ECC0.width=32
AT91C_SYS_ECC0.byteEndian=little
AT91C_SYS_GPBR.name="AT91C_SYS_GPBR"
AT91C_SYS_GPBR.description="General Purpose Register"
AT91C_SYS_GPBR.helpkey="General Purpose Register"
AT91C_SYS_GPBR.access=memorymapped
AT91C_SYS_GPBR.address=0xFFFFFD60
AT91C_SYS_GPBR.width=32
AT91C_SYS_GPBR.byteEndian=little
# ========== Register definition for EBI0 peripheral ========== 
AT91C_EBI0_DUMMY.name="AT91C_EBI0_DUMMY"
AT91C_EBI0_DUMMY.description="Dummy register - Do not use"
AT91C_EBI0_DUMMY.helpkey="Dummy register - Do not use"
AT91C_EBI0_DUMMY.access=memorymapped
AT91C_EBI0_DUMMY.address=0xFFFFE200
AT91C_EBI0_DUMMY.width=32
AT91C_EBI0_DUMMY.byteEndian=little
# ========== Register definition for SDRAMC0 peripheral ========== 
AT91C_SDRAMC0_MDR.name="AT91C_SDRAMC0_MDR"
AT91C_SDRAMC0_MDR.description="SDRAM Memory Device Register"
AT91C_SDRAMC0_MDR.helpkey="SDRAM Memory Device Register"
AT91C_SDRAMC0_MDR.access=memorymapped
AT91C_SDRAMC0_MDR.address=0xFFFFE224
AT91C_SDRAMC0_MDR.width=32
AT91C_SDRAMC0_MDR.byteEndian=little
AT91C_SDRAMC0_MDR.permission.write=none
AT91C_SDRAMC0_IDR.name="AT91C_SDRAMC0_IDR"
AT91C_SDRAMC0_IDR.description="SDRAM Controller Interrupt Disable Register"
AT91C_SDRAMC0_IDR.helpkey="SDRAM Controller Interrupt Disable Register"
AT91C_SDRAMC0_IDR.access=memorymapped
AT91C_SDRAMC0_IDR.address=0xFFFFE218
AT91C_SDRAMC0_IDR.width=32
AT91C_SDRAMC0_IDR.byteEndian=little
AT91C_SDRAMC0_IDR.type=enum
AT91C_SDRAMC0_IDR.enum.0.name=*** Write only ***
AT91C_SDRAMC0_IDR.enum.1.name=Error
AT91C_SDRAMC0_IMR.name="AT91C_SDRAMC0_IMR"
AT91C_SDRAMC0_IMR.description="SDRAM Controller Interrupt Mask Register"
AT91C_SDRAMC0_IMR.helpkey="SDRAM Controller Interrupt Mask Register"
AT91C_SDRAMC0_IMR.access=memorymapped
AT91C_SDRAMC0_IMR.address=0xFFFFE21C
AT91C_SDRAMC0_IMR.width=32
AT91C_SDRAMC0_IMR.byteEndian=little
AT91C_SDRAMC0_IMR.permission.write=none
AT91C_SDRAMC0_ISR.name="AT91C_SDRAMC0_ISR"
AT91C_SDRAMC0_ISR.description="SDRAM Controller Interrupt Mask Register"
AT91C_SDRAMC0_ISR.helpkey="SDRAM Controller Interrupt Mask Register"
AT91C_SDRAMC0_ISR.access=memorymapped
AT91C_SDRAMC0_ISR.address=0xFFFFE220
AT91C_SDRAMC0_ISR.width=32
AT91C_SDRAMC0_ISR.byteEndian=little
AT91C_SDRAMC0_ISR.permission.write=none
AT91C_SDRAMC0_HSR.name="AT91C_SDRAMC0_HSR"
AT91C_SDRAMC0_HSR.description="SDRAM Controller High Speed Register"
AT91C_SDRAMC0_HSR.helpkey="SDRAM Controller High Speed Register"
AT91C_SDRAMC0_HSR.access=memorymapped
AT91C_SDRAMC0_HSR.address=0xFFFFE20C
AT91C_SDRAMC0_HSR.width=32
AT91C_SDRAMC0_HSR.byteEndian=little
AT91C_SDRAMC0_TR.name="AT91C_SDRAMC0_TR"
AT91C_SDRAMC0_TR.description="SDRAM Controller Refresh Timer Register"
AT91C_SDRAMC0_TR.helpkey="SDRAM Controller Refresh Timer Register"
AT91C_SDRAMC0_TR.access=memorymapped
AT91C_SDRAMC0_TR.address=0xFFFFE204
AT91C_SDRAMC0_TR.width=32
AT91C_SDRAMC0_TR.byteEndian=little
AT91C_SDRAMC0_CR.name="AT91C_SDRAMC0_CR"
AT91C_SDRAMC0_CR.description="SDRAM Controller Configuration Register"
AT91C_SDRAMC0_CR.helpkey="SDRAM Controller Configuration Register"
AT91C_SDRAMC0_CR.access=memorymapped
AT91C_SDRAMC0_CR.address=0xFFFFE208
AT91C_SDRAMC0_CR.width=32
AT91C_SDRAMC0_CR.byteEndian=little
AT91C_SDRAMC0_MR.name="AT91C_SDRAMC0_MR"
AT91C_SDRAMC0_MR.description="SDRAM Controller Mode Register"
AT91C_SDRAMC0_MR.helpkey="SDRAM Controller Mode Register"
AT91C_SDRAMC0_MR.access=memorymapped
AT91C_SDRAMC0_MR.address=0xFFFFE200
AT91C_SDRAMC0_MR.width=32
AT91C_SDRAMC0_MR.byteEndian=little
AT91C_SDRAMC0_LPR.name="AT91C_SDRAMC0_LPR"
AT91C_SDRAMC0_LPR.description="SDRAM Controller Low Power Register"
AT91C_SDRAMC0_LPR.helpkey="SDRAM Controller Low Power Register"
AT91C_SDRAMC0_LPR.access=memorymapped
AT91C_SDRAMC0_LPR.address=0xFFFFE210
AT91C_SDRAMC0_LPR.width=32
AT91C_SDRAMC0_LPR.byteEndian=little
AT91C_SDRAMC0_IER.name="AT91C_SDRAMC0_IER"
AT91C_SDRAMC0_IER.description="SDRAM Controller Interrupt Enable Register"
AT91C_SDRAMC0_IER.helpkey="SDRAM Controller Interrupt Enable Register"
AT91C_SDRAMC0_IER.access=memorymapped
AT91C_SDRAMC0_IER.address=0xFFFFE214
AT91C_SDRAMC0_IER.width=32
AT91C_SDRAMC0_IER.byteEndian=little
AT91C_SDRAMC0_IER.type=enum
AT91C_SDRAMC0_IER.enum.0.name=*** Write only ***
AT91C_SDRAMC0_IER.enum.1.name=Error
# ========== Register definition for SMC0 peripheral ========== 
AT91C_SMC0_CYCLE6.name="AT91C_SMC0_CYCLE6"
AT91C_SMC0_CYCLE6.description=" Cycle Register for CS 6"
AT91C_SMC0_CYCLE6.helpkey=" Cycle Register for CS 6"
AT91C_SMC0_CYCLE6.access=memorymapped
AT91C_SMC0_CYCLE6.address=0xFFFFE468
AT91C_SMC0_CYCLE6.width=32
AT91C_SMC0_CYCLE6.byteEndian=little
AT91C_SMC0_SETUP6.name="AT91C_SMC0_SETUP6"
AT91C_SMC0_SETUP6.description=" Setup Register for CS 6"
AT91C_SMC0_SETUP6.helpkey=" Setup Register for CS 6"
AT91C_SMC0_SETUP6.access=memorymapped
AT91C_SMC0_SETUP6.address=0xFFFFE460
AT91C_SMC0_SETUP6.width=32
AT91C_SMC0_SETUP6.byteEndian=little
AT91C_SMC0_PULSE3.name="AT91C_SMC0_PULSE3"
AT91C_SMC0_PULSE3.description=" Pulse Register for CS 3"
AT91C_SMC0_PULSE3.helpkey=" Pulse Register for CS 3"
AT91C_SMC0_PULSE3.access=memorymapped
AT91C_SMC0_PULSE3.address=0xFFFFE434
AT91C_SMC0_PULSE3.width=32
AT91C_SMC0_PULSE3.byteEndian=little
AT91C_SMC0_CYCLE1.name="AT91C_SMC0_CYCLE1"
AT91C_SMC0_CYCLE1.description=" Cycle Register for CS 1"
AT91C_SMC0_CYCLE1.helpkey=" Cycle Register for CS 1"
AT91C_SMC0_CYCLE1.access=memorymapped
AT91C_SMC0_CYCLE1.address=0xFFFFE418
AT91C_SMC0_CYCLE1.width=32
AT91C_SMC0_CYCLE1.byteEndian=little
AT91C_SMC0_SETUP5.name="AT91C_SMC0_SETUP5"
AT91C_SMC0_SETUP5.description=" Setup Register for CS 5"
AT91C_SMC0_SETUP5.helpkey=" Setup Register for CS 5"
AT91C_SMC0_SETUP5.access=memorymapped
AT91C_SMC0_SETUP5.address=0xFFFFE450
AT91C_SMC0_SETUP5.width=32
AT91C_SMC0_SETUP5.byteEndian=little
AT91C_SMC0_CYCLE7.name="AT91C_SMC0_CYCLE7"
AT91C_SMC0_CYCLE7.description=" Cycle Register for CS 7"
AT91C_SMC0_CYCLE7.helpkey=" Cycle Register for CS 7"
AT91C_SMC0_CYCLE7.access=memorymapped
AT91C_SMC0_CYCLE7.address=0xFFFFE478
AT91C_SMC0_CYCLE7.width=32
AT91C_SMC0_CYCLE7.byteEndian=little
AT91C_SMC0_PULSE0.name="AT91C_SMC0_PULSE0"
AT91C_SMC0_PULSE0.description=" Pulse Register for CS 0"
AT91C_SMC0_PULSE0.helpkey=" Pulse Register for CS 0"
AT91C_SMC0_PULSE0.access=memorymapped
AT91C_SMC0_PULSE0.address=0xFFFFE404
AT91C_SMC0_PULSE0.width=32
AT91C_SMC0_PULSE0.byteEndian=little
AT91C_SMC0_CYCLE5.name="AT91C_SMC0_CYCLE5"
AT91C_SMC0_CYCLE5.description=" Cycle Register for CS 5"
AT91C_SMC0_CYCLE5.helpkey=" Cycle Register for CS 5"
AT91C_SMC0_CYCLE5.access=memorymapped
AT91C_SMC0_CYCLE5.address=0xFFFFE458
AT91C_SMC0_CYCLE5.width=32
AT91C_SMC0_CYCLE5.byteEndian=little
AT91C_SMC0_CTRL0.name="AT91C_SMC0_CTRL0"
AT91C_SMC0_CTRL0.description=" Control Register for CS 0"
AT91C_SMC0_CTRL0.helpkey=" Control Register for CS 0"
AT91C_SMC0_CTRL0.access=memorymapped
AT91C_SMC0_CTRL0.address=0xFFFFE40C
AT91C_SMC0_CTRL0.width=32
AT91C_SMC0_CTRL0.byteEndian=little
AT91C_SMC0_SETUP7.name="AT91C_SMC0_SETUP7"
AT91C_SMC0_SETUP7.description=" Setup Register for CS 7"
AT91C_SMC0_SETUP7.helpkey=" Setup Register for CS 7"
AT91C_SMC0_SETUP7.access=memorymapped
AT91C_SMC0_SETUP7.address=0xFFFFE470
AT91C_SMC0_SETUP7.width=32
AT91C_SMC0_SETUP7.byteEndian=little
AT91C_SMC0_CTRL4.name="AT91C_SMC0_CTRL4"
AT91C_SMC0_CTRL4.description=" Control Register for CS 4"
AT91C_SMC0_CTRL4.helpkey=" Control Register for CS 4"
AT91C_SMC0_CTRL4.access=memorymapped
AT91C_SMC0_CTRL4.address=0xFFFFE44C
AT91C_SMC0_CTRL4.width=32
AT91C_SMC0_CTRL4.byteEndian=little
AT91C_SMC0_CTRL1.name="AT91C_SMC0_CTRL1"
AT91C_SMC0_CTRL1.description=" Control Register for CS 1"
AT91C_SMC0_CTRL1.helpkey=" Control Register for CS 1"
AT91C_SMC0_CTRL1.access=memorymapped
AT91C_SMC0_CTRL1.address=0xFFFFE41C
AT91C_SMC0_CTRL1.width=32
AT91C_SMC0_CTRL1.byteEndian=little
AT91C_SMC0_CYCLE2.name="AT91C_SMC0_CYCLE2"
AT91C_SMC0_CYCLE2.description=" Cycle Register for CS 2"
AT91C_SMC0_CYCLE2.helpkey=" Cycle Register for CS 2"
AT91C_SMC0_CYCLE2.access=memorymapped
AT91C_SMC0_CYCLE2.address=0xFFFFE428
AT91C_SMC0_CYCLE2.width=32
AT91C_SMC0_CYCLE2.byteEndian=little
AT91C_SMC0_PULSE7.name="AT91C_SMC0_PULSE7"
AT91C_SMC0_PULSE7.description=" Pulse Register for CS 7"
AT91C_SMC0_PULSE7.helpkey=" Pulse Register for CS 7"
AT91C_SMC0_PULSE7.access=memorymapped
AT91C_SMC0_PULSE7.address=0xFFFFE474
AT91C_SMC0_PULSE7.width=32
AT91C_SMC0_PULSE7.byteEndian=little
AT91C_SMC0_PULSE6.name="AT91C_SMC0_PULSE6"
AT91C_SMC0_PULSE6.description=" Pulse Register for CS 6"
AT91C_SMC0_PULSE6.helpkey=" Pulse Register for CS 6"
AT91C_SMC0_PULSE6.access=memorymapped
AT91C_SMC0_PULSE6.address=0xFFFFE464
AT91C_SMC0_PULSE6.width=32
AT91C_SMC0_PULSE6.byteEndian=little
AT91C_SMC0_CYCLE4.name="AT91C_SMC0_CYCLE4"
AT91C_SMC0_CYCLE4.description=" Cycle Register for CS 4"
AT91C_SMC0_CYCLE4.helpkey=" Cycle Register for CS 4"
AT91C_SMC0_CYCLE4.access=memorymapped
AT91C_SMC0_CYCLE4.address=0xFFFFE448
AT91C_SMC0_CYCLE4.width=32
AT91C_SMC0_CYCLE4.byteEndian=little
AT91C_SMC0_CYCLE0.name="AT91C_SMC0_CYCLE0"
AT91C_SMC0_CYCLE0.description=" Cycle Register for CS 0"
AT91C_SMC0_CYCLE0.helpkey=" Cycle Register for CS 0"
AT91C_SMC0_CYCLE0.access=memorymapped
AT91C_SMC0_CYCLE0.address=0xFFFFE408
AT91C_SMC0_CYCLE0.width=32
AT91C_SMC0_CYCLE0.byteEndian=little
AT91C_SMC0_CTRL6.name="AT91C_SMC0_CTRL6"
AT91C_SMC0_CTRL6.description=" Control Register for CS 6"
AT91C_SMC0_CTRL6.helpkey=" Control Register for CS 6"
AT91C_SMC0_CTRL6.access=memorymapped
AT91C_SMC0_CTRL6.address=0xFFFFE46C
AT91C_SMC0_CTRL6.width=32
AT91C_SMC0_CTRL6.byteEndian=little
AT91C_SMC0_CTRL5.name="AT91C_SMC0_CTRL5"
AT91C_SMC0_CTRL5.description=" Control Register for CS 5"
AT91C_SMC0_CTRL5.helpkey=" Control Register for CS 5"
AT91C_SMC0_CTRL5.access=memorymapped
AT91C_SMC0_CTRL5.address=0xFFFFE45C
AT91C_SMC0_CTRL5.width=32
AT91C_SMC0_CTRL5.byteEndian=little
AT91C_SMC0_SETUP0.name="AT91C_SMC0_SETUP0"
AT91C_SMC0_SETUP0.description=" Setup Register for CS 0"
AT91C_SMC0_SETUP0.helpkey=" Setup Register for CS 0"
AT91C_SMC0_SETUP0.access=memorymapped
AT91C_SMC0_SETUP0.address=0xFFFFE400
AT91C_SMC0_SETUP0.width=32