fft.ssf
来自「关于FFT实现的Verilog代码」· SSF 代码 · 共 15 行
SSF
15 行
SIMULATOR_SETTINGS
{
ESTIMATE_POWER_CONSUMPTION = OFF;
GLITCH_INTERVAL = 1NS;
GLITCH_DETECTION = OFF;
SIMULATION_COVERAGE = ON;
CHECK_OUTPUTS = OFF;
SETUP_HOLD_DETECTION = OFF;
POWER_ESTIMATION_START_TIME = "0 NS";
ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS = ON;
SIMULATION_MODE = FUNCTIONAL;
START_TIME = 0NS;
USE_COMPILER_SETTINGS = fft;
}
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