fft.fit.eqn

关于FFT实现的Verilog代码

--F6_result[0] is lpm_add_sub_16:out3_out4|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[0] at LC_X44_Y30_N2
--operation mode is arithmetic

F6_result[0] = H4_result[0] $ H2_result[0];

--F6L53 is lpm_add_sub_16:out3_out4|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[0]~COUT0 at LC_X44_Y30_N2
--operation mode is arithmetic

F6L53_cout_0 = H4_result[0] & H2_result[0];
F6L53 = CARRY(F6L53_cout_0);

--F6L63 is lpm_add_sub_16:out3_out4|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[0]~COUT1 at LC_X44_Y30_N2
--operation mode is arithmetic

F6L63_cout_1 = H4_result[0] & H2_result[0];
F6L63 = CARRY(F6L63_cout_1);


--F5_result[15] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[15] at LC_X46_Y7_N7
--operation mode is normal

F5_result[15]_carry_eqn = (!F5L72 & F5L17) # (F5L72 & F5L27);
F5_result[15] = H3_result[15] $ H1_result[15] $ !F5_result[15]_carry_eqn;


--F5_result[14] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[14] at LC_X46_Y7_N6
--operation mode is arithmetic

F5_result[14]_carry_eqn = (!F5L72 & F5L86) # (F5L72 & F5L96);
F5_result[14] = H3_result[14] $ H1_result[14] $ F5_result[14]_carry_eqn;

--F5L17 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[14]~COUT0 at LC_X46_Y7_N6
--operation mode is arithmetic

F5L17_cout_0 = H3_result[14] & (!F5L86 # !H1_result[14]) # !H3_result[14] & !H1_result[14] & !F5L86;
F5L17 = CARRY(F5L17_cout_0);

--F5L27 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[14]~COUT1 at LC_X46_Y7_N6
--operation mode is arithmetic

F5L27_cout_1 = H3_result[14] & (!F5L96 # !H1_result[14]) # !H3_result[14] & !H1_result[14] & !F5L96;
F5L27 = CARRY(F5L27_cout_1);


--F5_result[13] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[13] at LC_X46_Y7_N5
--operation mode is arithmetic

F5_result[13]_carry_eqn = F5L72;
F5_result[13] = H1_result[13] $ H3_result[13] $ !F5_result[13]_carry_eqn;

--F5L86 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[13]~COUT0 at LC_X46_Y7_N5
--operation mode is arithmetic

F5L86_cout_0 = H1_result[13] & (!F5L72 # !H3_result[13]) # !H1_result[13] & !H3_result[13] & !F5L72;
F5L86 = CARRY(F5L86_cout_0);

--F5L96 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[13]~COUT1 at LC_X46_Y7_N5
--operation mode is arithmetic

F5L96_cout_1 = H1_result[13] & (!F5L72 # !H3_result[13]) # !H1_result[13] & !H3_result[13] & !F5L72;
F5L96 = CARRY(F5L96_cout_1);


--F5_result[12] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[12] at LC_X46_Y7_N4
--operation mode is arithmetic

F5_result[12]_carry_eqn = (!F5L71 & F5L46) # (F5L71 & F5L56);
F5_result[12] = H1_result[12] $ H3_result[12] $ F5_result[12]_carry_eqn;

--F5L72 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|add_sub_cell[12]~COUT at LC_X46_Y7_N4
--operation mode is arithmetic

F5L72 = CARRY(H1_result[12] & H3_result[12] & !F5L56 # !H1_result[12] & (H3_result[12] # !F5L56));


--F5_result[11] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[11] at LC_X46_Y7_N3
--operation mode is arithmetic

F5_result[11]_carry_eqn = (!F5L71 & F5L16) # (F5L71 & F5L26);
F5_result[11] = H1_result[11] $ H3_result[11] $ !F5_result[11]_carry_eqn;

--F5L46 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[11]~COUT0 at LC_X46_Y7_N3
--operation mode is arithmetic

F5L46_cout_0 = H1_result[11] & (!F5L16 # !H3_result[11]) # !H1_result[11] & !H3_result[11] & !F5L16;
F5L46 = CARRY(F5L46_cout_0);

--F5L56 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[11]~COUT1 at LC_X46_Y7_N3
--operation mode is arithmetic

F5L56_cout_1 = H1_result[11] & (!F5L26 # !H3_result[11]) # !H1_result[11] & !H3_result[11] & !F5L26;
F5L56 = CARRY(F5L56_cout_1);


--F5_result[10] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[10] at LC_X46_Y7_N2
--operation mode is arithmetic

F5_result[10]_carry_eqn = (!F5L71 & F5L85) # (F5L71 & F5L95);
F5_result[10] = H3_result[10] $ H1_result[10] $ F5_result[10]_carry_eqn;

--F5L16 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[10]~COUT0 at LC_X46_Y7_N2
--operation mode is arithmetic

F5L16_cout_0 = H3_result[10] & (!F5L85 # !H1_result[10]) # !H3_result[10] & !H1_result[10] & !F5L85;
F5L16 = CARRY(F5L16_cout_0);

--F5L26 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[10]~COUT1 at LC_X46_Y7_N2
--operation mode is arithmetic

F5L26_cout_1 = H3_result[10] & (!F5L95 # !H1_result[10]) # !H3_result[10] & !H1_result[10] & !F5L95;
F5L26 = CARRY(F5L26_cout_1);


--F5_result[9] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[9] at LC_X46_Y7_N1
--operation mode is arithmetic

F5_result[9]_carry_eqn = (!F5L71 & F5L55) # (F5L71 & F5L65);
F5_result[9] = H1_result[9] $ H3_result[9] $ !F5_result[9]_carry_eqn;

--F5L85 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[9]~COUT0 at LC_X46_Y7_N1
--operation mode is arithmetic

F5L85_cout_0 = H1_result[9] & (!F5L55 # !H3_result[9]) # !H1_result[9] & !H3_result[9] & !F5L55;
F5L85 = CARRY(F5L85_cout_0);

--F5L95 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[9]~COUT1 at LC_X46_Y7_N1
--operation mode is arithmetic

F5L95_cout_1 = H1_result[9] & (!F5L65 # !H3_result[9]) # !H1_result[9] & !H3_result[9] & !F5L65;
F5L95 = CARRY(F5L95_cout_1);


--F5_result[8] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[8] at LC_X46_Y7_N0
--operation mode is arithmetic

F5_result[8]_carry_eqn = F5L71;
F5_result[8] = H3_result[8] $ H1_result[8] $ F5_result[8]_carry_eqn;

--F5L55 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[8]~COUT0 at LC_X46_Y7_N0
--operation mode is arithmetic

F5L55_cout_0 = H3_result[8] & (!F5L71 # !H1_result[8]) # !H3_result[8] & !H1_result[8] & !F5L71;
F5L55 = CARRY(F5L55_cout_0);

--F5L65 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[8]~COUT1 at LC_X46_Y7_N0
--operation mode is arithmetic

F5L65_cout_1 = H3_result[8] & (!F5L71 # !H1_result[8]) # !H3_result[8] & !H1_result[8] & !F5L71;
F5L65 = CARRY(F5L65_cout_1);


--F5_result[7] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[7] at LC_X46_Y8_N9
--operation mode is arithmetic

F5_result[7]_carry_eqn = (!F5L7 & F5L15) # (F5L7 & F5L25);
F5_result[7] = H3_result[7] $ H1_result[7] $ !F5_result[7]_carry_eqn;

--F5L71 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|add_sub_cell[7]~COUT at LC_X46_Y8_N9
--operation mode is arithmetic

F5L71 = CARRY(H3_result[7] & H1_result[7] & !F5L25 # !H3_result[7] & (H1_result[7] # !F5L25));


--F5_result[6] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[6] at LC_X46_Y8_N8
--operation mode is arithmetic

F5_result[6]_carry_eqn = (!F5L7 & F5L84) # (F5L7 & F5L94);
F5_result[6] = H3_result[6] $ H1_result[6] $ F5_result[6]_carry_eqn;

--F5L15 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[6]~COUT0 at LC_X46_Y8_N8
--operation mode is arithmetic

F5L15_cout_0 = H3_result[6] & (!F5L84 # !H1_result[6]) # !H3_result[6] & !H1_result[6] & !F5L84;
F5L15 = CARRY(F5L15_cout_0);

--F5L25 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[6]~COUT1 at LC_X46_Y8_N8
--operation mode is arithmetic

F5L25_cout_1 = H3_result[6] & (!F5L94 # !H1_result[6]) # !H3_result[6] & !H1_result[6] & !F5L94;
F5L25 = CARRY(F5L25_cout_1);


--F5_result[5] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[5] at LC_X46_Y8_N7
--operation mode is arithmetic

F5_result[5]_carry_eqn = (!F5L7 & F5L54) # (F5L7 & F5L64);
F5_result[5] = H3_result[5] $ H1_result[5] $ !F5_result[5]_carry_eqn;

--F5L84 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[5]~COUT0 at LC_X46_Y8_N7
--operation mode is arithmetic

F5L84_cout_0 = H3_result[5] & H1_result[5] & !F5L54 # !H3_result[5] & (H1_result[5] # !F5L54);
F5L84 = CARRY(F5L84_cout_0);

--F5L94 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[5]~COUT1 at LC_X46_Y8_N7
--operation mode is arithmetic

F5L94_cout_1 = H3_result[5] & H1_result[5] & !F5L64 # !H3_result[5] & (H1_result[5] # !F5L64);
F5L94 = CARRY(F5L94_cout_1);


--F5_result[4] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[4] at LC_X46_Y8_N6
--operation mode is arithmetic

F5_result[4]_carry_eqn = (!F5L7 & F5L24) # (F5L7 & F5L34);
F5_result[4] = H3_result[4] $ H1_result[4] $ F5_result[4]_carry_eqn;

--F5L54 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[4]~COUT0 at LC_X46_Y8_N6
--operation mode is arithmetic

F5L54_cout_0 = H3_result[4] & (!F5L24 # !H1_result[4]) # !H3_result[4] & !H1_result[4] & !F5L24;
F5L54 = CARRY(F5L54_cout_0);

--F5L64 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[4]~COUT1 at LC_X46_Y8_N6
--operation mode is arithmetic

F5L64_cout_1 = H3_result[4] & (!F5L34 # !H1_result[4]) # !H3_result[4] & !H1_result[4] & !F5L34;
F5L64 = CARRY(F5L64_cout_1);


--F5_result[3] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[3] at LC_X46_Y8_N5
--operation mode is arithmetic

F5_result[3]_carry_eqn = F5L7;
F5_result[3] = H3_result[3] $ H1_result[3] $ !F5_result[3]_carry_eqn;

--F5L24 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[3]~COUT0 at LC_X46_Y8_N5
--operation mode is arithmetic

F5L24_cout_0 = H3_result[3] & H1_result[3] & !F5L7 # !H3_result[3] & (H1_result[3] # !F5L7);
F5L24 = CARRY(F5L24_cout_0);

--F5L34 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[3]~COUT1 at LC_X46_Y8_N5
--operation mode is arithmetic

F5L34_cout_1 = H3_result[3] & H1_result[3] & !F5L7 # !H3_result[3] & (H1_result[3] # !F5L7);
F5L34 = CARRY(F5L34_cout_1);


--F5_result[2] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[2] at LC_X46_Y8_N4
--operation mode is arithmetic

F5_result[2] = H1_result[2] $ H3_result[2] $ F5L83;

--F5L7 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|add_sub_cell[2]~COUT at LC_X46_Y8_N4
--operation mode is arithmetic

F5L7 = CARRY(H1_result[2] & H3_result[2] & !F5L93 # !H1_result[2] & (H3_result[2] # !F5L93));


--F5_result[1] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[1] at LC_X46_Y8_N3
--operation mode is arithmetic

F5_result[1] = H3_result[1] $ H1_result[1] $ !F5L53;

--F5L83 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[1]~COUT0 at LC_X46_Y8_N3
--operation mode is arithmetic

F5L83_cout_0 = H3_result[1] & H1_result[1] & !F5L53 # !H3_result[1] & (H1_result[1] # !F5L53);
F5L83 = CARRY(F5L83_cout_0);

--F5L93 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[1]~COUT1 at LC_X46_Y8_N3
--operation mode is arithmetic

F5L93_cout_1 = H3_result[1] & H1_result[1] & !F5L63 # !H3_result[1] & (H1_result[1] # !F5L63);
F5L93 = CARRY(F5L93_cout_1);


--F5_result[0] is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[0] at LC_X46_Y8_N2
--operation mode is arithmetic

F5_result[0] = H3_result[0] $ H1_result[0];

--F5L53 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[0]~COUT0 at LC_X46_Y8_N2
--operation mode is arithmetic

F5L53_cout_0 = H3_result[0] # !H1_result[0];
F5L53 = CARRY(F5L53_cout_0);

--F5L63 is lpm_add_sub_16:out1_out2|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[0]~COUT1 at LC_X46_Y8_N2
--operation mode is arithmetic

F5L63_cout_1 = H3_result[0] # !H1_result[0];
F5L63 = CARRY(F5L63_cout_1);


--H2_mac_mult2 is lpm_mula:mult_x2_w_im_re|lpm_mult:lpm_mult_component|mult_6bk:auto_generated|mac_mult2 at DSPMULT_X42_Y29_N0
--DSP Block Multiplier Base Width: 9-bits
H2_mac_mult2_a_data = DATA(x2_im[7], x2_im[6], x2_im[5], x2_im[4], x2_im[3], x2_im[2], x2_im[1], x2_im[0]);
H2_mac_mult2_a_rep = UNSIGNED(H2_mac_mult2_a_data);
H2_mac_mult2_b_data = DATA(w_re[7], w_re[6], w_re[5], w_re[4], w_re[3], w_re[2], w_re[1], w_re[0]);
H2_mac_mult2_b_rep = UNSIGNED(H2_mac_mult2_b_data);
H2_mac_mult2_result = H2_mac_mult2_a_rep * H2_mac_mult2_b_rep;
H2_mac_mult2 = H2_mac_mult2_result[0];

--H2L6 is lpm_mula:mult_x2_w_im_re|lpm_mult:lpm_mult_component|mult_6bk:auto_generated|mac_mult2~DATAOUT1 at DSPMULT_X42_Y29_N0
H2L6 = H2_mac_mult2_result[1];

--H2L7 is lpm_mula:mult_x2_w_im_re|lpm_mult:lpm_mult_component|mult_6bk:auto_generated|mac_mult2~DATAOUT2 at DSPMULT_X42_Y29_N0
H2L7 = H2_mac_mult2_result[2];

--H2L8 is lpm_mula:mult_x2_w_im_re|lpm_mult:lpm_mult_component|mult_6bk:auto_generated|mac_mult2~DATAOUT3 at DSPMULT_X42_Y29_N0
H2L8 = H2_mac_mult2_result[3];

--H2L9 is lpm_mula:mult_x2_w_im_re|lpm_mult:lpm_mult_component|mult_6bk:auto_generated|mac_mult2~DATAOUT4 at DSPMULT_X42_Y29_N0
H2L9 = H2_mac_mult2_result[4];