fft.fit.eqn

关于FFT实现的Verilog代码

--operation mode is arithmetic

A1L63_cout_1 = F6_result[7] & !x1_im[1] & !A1L23 # !F6_result[7] & (!A1L23 # !x1_im[1]);
A1L63 = CARRY(A1L63_cout_1);


--F1_result[0] is lpm_add_sua:add_x1_x2_im|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[0] at LC_X13_Y30_N0
--operation mode is arithmetic

F1_result[0] = F6_result[6] $ x1_im[0];

--A1L03Q is out1_im[0]~reg0 at LC_X13_Y30_N0
--operation mode is arithmetic

A1L03Q = DFFEA(F1_result[0], GLOBAL(clk), VCC, , start, , );

--A1L13 is out1_im[0]~reg0COUT0 at LC_X13_Y30_N0
--operation mode is arithmetic

A1L13_cout_0 = F6_result[6] & x1_im[0];
A1L13 = CARRY(A1L13_cout_0);

--A1L23 is out1_im[0]~reg0COUT1 at LC_X13_Y30_N0
--operation mode is arithmetic

A1L23_cout_1 = F6_result[6] & x1_im[0];
A1L23 = CARRY(A1L23_cout_1);


--F4_result[7] is lpm_add_sua:add_x1_x2_re1|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[7] at LC_X33_Y1_N7
--operation mode is normal

F4_result[7]_carry_eqn = (!F4L11 & A1L481) # (F4L11 & A1L581);
F4_result[7] = F5_result[13] $ F4_result[7]_carry_eqn $ !x1_re[7];

--A1L781Q is out2_re[7]~reg0 at LC_X33_Y1_N7
--operation mode is normal

A1L781Q = DFFEA(F4_result[7], GLOBAL(clk), VCC, , start, , );


--F4_result[6] is lpm_add_sua:add_x1_x2_re1|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[6] at LC_X33_Y1_N6
--operation mode is arithmetic

F4_result[6]_carry_eqn = (!F4L11 & A1L081) # (F4L11 & A1L181);
F4_result[6] = x1_re[6] $ F5_result[12] $ F4_result[6]_carry_eqn;

--A1L381Q is out2_re[6]~reg0 at LC_X33_Y1_N6
--operation mode is arithmetic

A1L381Q = DFFEA(F4_result[6], GLOBAL(clk), VCC, , start, , );

--A1L481 is out2_re[6]~reg0COUT0 at LC_X33_Y1_N6
--operation mode is arithmetic

A1L481_cout_0 = x1_re[6] & (!A1L081 # !F5_result[12]) # !x1_re[6] & !F5_result[12] & !A1L081;
A1L481 = CARRY(A1L481_cout_0);

--A1L581 is out2_re[6]~reg0COUT1 at LC_X33_Y1_N6
--operation mode is arithmetic

A1L581_cout_1 = x1_re[6] & (!A1L181 # !F5_result[12]) # !x1_re[6] & !F5_result[12] & !A1L181;
A1L581 = CARRY(A1L581_cout_1);


--F4_result[5] is lpm_add_sua:add_x1_x2_re1|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[5] at LC_X33_Y1_N5
--operation mode is arithmetic

F4_result[5]_carry_eqn = (!F4L11 & GND) # (F4L11 & VCC);
F4_result[5] = F5_result[11] $ x1_re[5] $ !F4_result[5]_carry_eqn;

--A1L971Q is out2_re[5]~reg0 at LC_X33_Y1_N5
--operation mode is arithmetic

A1L971Q = DFFEA(F4_result[5], GLOBAL(clk), VCC, , start, , );

--A1L081 is out2_re[5]~reg0COUT0 at LC_X33_Y1_N5
--operation mode is arithmetic

A1L081_cout_0 = F5_result[11] & (!F4L11 # !x1_re[5]) # !F5_result[11] & !x1_re[5] & !F4L11;
A1L081 = CARRY(A1L081_cout_0);

--A1L181 is out2_re[5]~reg0COUT1 at LC_X33_Y1_N5
--operation mode is arithmetic

A1L181_cout_1 = F5_result[11] & (!F4L11 # !x1_re[5]) # !F5_result[11] & !x1_re[5] & !F4L11;
A1L181 = CARRY(A1L181_cout_1);


--F4_result[4] is lpm_add_sua:add_x1_x2_re1|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[4] at LC_X33_Y1_N4
--operation mode is arithmetic

F4_result[4] = F5_result[10] $ x1_re[4] $ A1L471;

--A1L771Q is out2_re[4]~reg0 at LC_X33_Y1_N4
--operation mode is arithmetic

A1L771Q = DFFEA(F4_result[4], GLOBAL(clk), VCC, , start, , );

--F4L11 is lpm_add_sua:add_x1_x2_re1|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|add_sub_cell[4]~COUT at LC_X33_Y1_N4
--operation mode is arithmetic

F4L11 = F4L92;


--F4_result[3] is lpm_add_sua:add_x1_x2_re1|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[3] at LC_X33_Y1_N3
--operation mode is arithmetic

F4_result[3] = F5_result[9] $ x1_re[3] $ !A1L071;

--A1L371Q is out2_re[3]~reg0 at LC_X33_Y1_N3
--operation mode is arithmetic

A1L371Q = DFFEA(F4_result[3], GLOBAL(clk), VCC, , start, , );

--A1L471 is out2_re[3]~reg0COUT0 at LC_X33_Y1_N3
--operation mode is arithmetic

A1L471_cout_0 = F5_result[9] & (!A1L071 # !x1_re[3]) # !F5_result[9] & !x1_re[3] & !A1L071;
A1L471 = CARRY(A1L471_cout_0);

--A1L571 is out2_re[3]~reg0COUT1 at LC_X33_Y1_N3
--operation mode is arithmetic

A1L571_cout_1 = F5_result[9] & (!A1L171 # !x1_re[3]) # !F5_result[9] & !x1_re[3] & !A1L171;
A1L571 = CARRY(A1L571_cout_1);


--F4_result[2] is lpm_add_sua:add_x1_x2_re1|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[2] at LC_X33_Y1_N2
--operation mode is arithmetic

F4_result[2] = x1_re[2] $ F5_result[8] $ A1L661;

--A1L961Q is out2_re[2]~reg0 at LC_X33_Y1_N2
--operation mode is arithmetic

A1L961Q = DFFEA(F4_result[2], GLOBAL(clk), VCC, , start, , );

--A1L071 is out2_re[2]~reg0COUT0 at LC_X33_Y1_N2
--operation mode is arithmetic

A1L071_cout_0 = x1_re[2] & (!A1L661 # !F5_result[8]) # !x1_re[2] & !F5_result[8] & !A1L661;
A1L071 = CARRY(A1L071_cout_0);

--A1L171 is out2_re[2]~reg0COUT1 at LC_X33_Y1_N2
--operation mode is arithmetic

A1L171_cout_1 = x1_re[2] & (!A1L761 # !F5_result[8]) # !x1_re[2] & !F5_result[8] & !A1L761;
A1L171 = CARRY(A1L171_cout_1);


--F4_result[1] is lpm_add_sua:add_x1_x2_re1|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[1] at LC_X33_Y1_N1
--operation mode is arithmetic

F4_result[1] = F5_result[7] $ x1_re[1] $ !A1L261;

--A1L561Q is out2_re[1]~reg0 at LC_X33_Y1_N1
--operation mode is arithmetic

A1L561Q = DFFEA(F4_result[1], GLOBAL(clk), VCC, , start, , );

--A1L661 is out2_re[1]~reg0COUT0 at LC_X33_Y1_N1
--operation mode is arithmetic

A1L661_cout_0 = F5_result[7] & (!A1L261 # !x1_re[1]) # !F5_result[7] & !x1_re[1] & !A1L261;
A1L661 = CARRY(A1L661_cout_0);

--A1L761 is out2_re[1]~reg0COUT1 at LC_X33_Y1_N1
--operation mode is arithmetic

A1L761_cout_1 = F5_result[7] & (!A1L361 # !x1_re[1]) # !F5_result[7] & !x1_re[1] & !A1L361;
A1L761 = CARRY(A1L761_cout_1);


--F4_result[0] is lpm_add_sua:add_x1_x2_re1|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[0] at LC_X33_Y1_N0
--operation mode is arithmetic

F4_result[0] = F5_result[6] $ x1_re[0];

--A1L161Q is out2_re[0]~reg0 at LC_X33_Y1_N0
--operation mode is arithmetic

A1L161Q = DFFEA(F4_result[0], GLOBAL(clk), VCC, , start, , );

--A1L261 is out2_re[0]~reg0COUT0 at LC_X33_Y1_N0
--operation mode is arithmetic

A1L261_cout_0 = x1_re[0] # !F5_result[6];
A1L261 = CARRY(A1L261_cout_0);

--A1L361 is out2_re[0]~reg0COUT1 at LC_X33_Y1_N0
--operation mode is arithmetic

A1L361_cout_1 = x1_re[0] # !F5_result[6];
A1L361 = CARRY(A1L361_cout_1);


--F3_result[7] is lpm_add_sua:add_x1_x2_re|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[7] at LC_X25_Y1_N7
--operation mode is normal

F3_result[7]_carry_eqn = (!F3L11 & A1L19) # (F3L11 & A1L29);
F3_result[7] = F5_result[13] $ F3_result[7]_carry_eqn $ x1_re[7];

--A1L49Q is out1_re[7]~reg0 at LC_X25_Y1_N7
--operation mode is normal

A1L49Q = DFFEA(F3_result[7], GLOBAL(clk), VCC, , start, , );


--F3_result[6] is lpm_add_sua:add_x1_x2_re|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[6] at LC_X25_Y1_N6
--operation mode is arithmetic

F3_result[6]_carry_eqn = (!F3L11 & A1L78) # (F3L11 & A1L88);
F3_result[6] = F5_result[12] $ x1_re[6] $ !F3_result[6]_carry_eqn;

--A1L09Q is out1_re[6]~reg0 at LC_X25_Y1_N6
--operation mode is arithmetic

A1L09Q = DFFEA(F3_result[6], GLOBAL(clk), VCC, , start, , );

--A1L19 is out1_re[6]~reg0COUT0 at LC_X25_Y1_N6
--operation mode is arithmetic

A1L19_cout_0 = F5_result[12] & (x1_re[6] # !A1L78) # !F5_result[12] & x1_re[6] & !A1L78;
A1L19 = CARRY(A1L19_cout_0);

--A1L29 is out1_re[6]~reg0COUT1 at LC_X25_Y1_N6
--operation mode is arithmetic

A1L29_cout_1 = F5_result[12] & (x1_re[6] # !A1L88) # !F5_result[12] & x1_re[6] & !A1L88;
A1L29 = CARRY(A1L29_cout_1);


--F3_result[5] is lpm_add_sua:add_x1_x2_re|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[5] at LC_X25_Y1_N5
--operation mode is arithmetic

F3_result[5]_carry_eqn = (!F3L11 & GND) # (F3L11 & VCC);
F3_result[5] = F5_result[11] $ x1_re[5] $ F3_result[5]_carry_eqn;

--A1L68Q is out1_re[5]~reg0 at LC_X25_Y1_N5
--operation mode is arithmetic

A1L68Q = DFFEA(F3_result[5], GLOBAL(clk), VCC, , start, , );

--A1L78 is out1_re[5]~reg0COUT0 at LC_X25_Y1_N5
--operation mode is arithmetic

A1L78_cout_0 = F5_result[11] & !x1_re[5] & !F3L11 # !F5_result[11] & (!F3L11 # !x1_re[5]);
A1L78 = CARRY(A1L78_cout_0);

--A1L88 is out1_re[5]~reg0COUT1 at LC_X25_Y1_N5
--operation mode is arithmetic

A1L88_cout_1 = F5_result[11] & !x1_re[5] & !F3L11 # !F5_result[11] & (!F3L11 # !x1_re[5]);
A1L88 = CARRY(A1L88_cout_1);


--F3_result[4] is lpm_add_sua:add_x1_x2_re|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[4] at LC_X25_Y1_N4
--operation mode is arithmetic

F3_result[4] = F5_result[10] $ x1_re[4] $ !A1L18;

--A1L48Q is out1_re[4]~reg0 at LC_X25_Y1_N4
--operation mode is arithmetic

A1L48Q = DFFEA(F3_result[4], GLOBAL(clk), VCC, , start, , );

--F3L11 is lpm_add_sua:add_x1_x2_re|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|add_sub_cell[4]~COUT at LC_X25_Y1_N4
--operation mode is arithmetic

F3L11 = F3L92;


--F3_result[3] is lpm_add_sua:add_x1_x2_re|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[3] at LC_X25_Y1_N3
--operation mode is arithmetic

F3_result[3] = F5_result[9] $ x1_re[3] $ A1L77;

--A1L08Q is out1_re[3]~reg0 at LC_X25_Y1_N3
--operation mode is arithmetic

A1L08Q = DFFEA(F3_result[3], GLOBAL(clk), VCC, , start, , );

--A1L18 is out1_re[3]~reg0COUT0 at LC_X25_Y1_N3
--operation mode is arithmetic

A1L18_cout_0 = F5_result[9] & !x1_re[3] & !A1L77 # !F5_result[9] & (!A1L77 # !x1_re[3]);
A1L18 = CARRY(A1L18_cout_0);

--A1L28 is out1_re[3]~reg0COUT1 at LC_X25_Y1_N3
--operation mode is arithmetic

A1L28_cout_1 = F5_result[9] & !x1_re[3] & !A1L87 # !F5_result[9] & (!A1L87 # !x1_re[3]);
A1L28 = CARRY(A1L28_cout_1);


--F3_result[2] is lpm_add_sua:add_x1_x2_re|lpm_add_sub:lpm_add_sub_component|alt_stratix_add_sub:stratix_adder|result[2] at LC_X25_Y1_N2
--operation mode is arithmetic

F3_result[2] = F5_result[8] $ x1_re[2] $ !A1L37;

--A1L67Q is out1_re[2]~reg0 at LC_X25_Y1_N2
--operation mode is arithmetic

A1L67Q = DFFEA(F3_result[2], GLOBAL(clk), VCC, , start, , );

--A1L77 is out1_re[2]~reg0COUT0 at LC_X25_Y1_N2