not_gate_truth_table.vhd

来自「VHDL写的大部分程序。希望大家一起学习」· VHDL 代码 · 共 24 行

LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
ENTITY not_gate_truth_table IS
PORT(
		a		: IN	STD_LOGIC;
		y	    : OUT	STD_LOGIC);
END not_gate_truth_table;
ARCHITECTURE behavier OF not_gate_truth_table IS
SIGNAL temp :STD_LOGIC;
BEGIN
	truth_table:
	PROCESS(a)
	BEGIN
		CASE a IS
			WHEN '0' =>
			    y<='1';
			WHEN '1' =>
			    y<='0';
			WHEN OTHERS =>
			    y<='X';
		END CASE;
	END PROCESS truth_table;
END behavier;