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📄 main.c

📁 The Lite Evaluation/Demonstration Kit is intended to illustrate use of the AN3042. The AN3042 is c
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/*****************************************************************************
 *  MAIN.C
 *  
 *  For 3042 Testing...
 *  
 *  THIS CODE IS VERY PRELIMINARY. IS INCOMPLETE IN MANY WAYS.
 *  IS SIMPLY A COPY OF SOME OF THE CODE USED IN AN3042 CHIP TESTING.  
 *  IS SPECIFIC TO THE 860 PROCESSOR, THE MEMORY
 *  LAYOUT OF OUR VERIFICATION BOARD, AND THE GREEN HILLS 860 TOOLS.
 *
 *  HOWEVER, THIS CODE MAY SERVE AS A USEFUL EXAMPLE TO GET YOU STARTED, PROVIDED
 *  YOU ARE WILLING TO USE IT *ONLY* AS A STARTING POINT, AND VERIFY (WITH A LOGIC
 *  ANALYZER AND OTHER TOOLS) EVERY ASPECT OF ITS OPERATION IN YOUR SPECIFIC SYSTEM.
 *
 *  USE AT YOUR OWN RISK.
 *
 *  Copyright (c) 1997 Anchor Chips, Inc. See the license agreement for specific
 *  details on the use of this source code.  This code is intended to be used as 
 *  an example and is not guarenteed to be complete or correct.
 *****************************************************************************/


#include "AN3042.h"

// void aprintf( char *str,  ... );

const int NUMopr3042 = 8;  // Number of records in the following table...

struct reg_descrip_struct opRegs3042[NUMopr3042] =
{
  //  offset    omask       zmask       text

	{ 0x460,    0xFFFFe0f6, 0x00000000, "dahbase " },

	// Cannot do read/write test to 3 nv regs.

	{ 0x4B0,    0x00003ffc, 0x00000000, "dmalbase" },
	{ 0x4B4,    0xFFFFfffc, 0x00000000, "dmahbase" },
	{ 0x4B8,    0x00003ffc, 0x00000000, "dmasize " },
	// Cannot do read/write test to dmactl reg.
 
	// Do not write the HCTL register in the testOpRegs !!!  Cause the 3042 to go into Reset and
	//  ignore further stimulus.
	// { 0x4E0,    0x00000003, "hctl    " },
	{ 0x4E4,    0x033B0018, 0x00000018, "hint    " },
	{ 0x4E8,    0x0000ffff, 0x00000000, "hldata  " },

	{ 0x4F4,    0x032B0000, 0x00000000, "lint    " },
	{ 0x4F8,    0x0000ffff, 0x00000000, "lhdata  " },
//	{ 0x4FC,    0x0000ff00, "lbuscfg " },
};


long * AN3042ptr  = (long *)  CS1_BASE;
long * DAHBASEptr = (long *) (CS1_BASE + DAHBASEoffset);
long * DAregion   = (long *) (CS1_BASE + DAregionoffset);

/*
Cannot do the follow with the 3042, that is, whenever direct access Reads are done, all byte lanes are active.
Direct access writes can control the Byte Enables for Writes.
short * DAregion_W   = (short *) (CS1_BASE + DAregionoffset);
char  * DAregion_B   = (char *)  (CS1_BASE + DAregionoffset);
*/

long * SRAMptr    = (long *)  CS2_BASE;
long * LEDptr     = (long *)  CS3_BASE;
  

long LEDvalue = 0;  // A count up value used only in the LEDtest.

int errorCnt = 0;


struct _local_i2o_regs_struct * i2oregp = (struct _local_i2o_regs_struct *) CS1_BASE;
struct op_regs_struct_42_t    * regp    = (struct op_regs_struct_42_t *)   (CS1_BASE + OP_REGS_BASE_42);




////// Defines for the Mutha Shared Mem Test

enum Side       {PCI, Local, Unused};
enum ExpectErrs {MUSTpass, ERRORSok};
enum DoComplement {trueData, complementData}; 

struct block_descrip_struct {
  enum   Side  side;	
  DWORD  size;
  DWORD  start;
  enum   ExpectErrs expecterrs;  
};

struct block_descrip_struct muthaBlock[] =
{
       // Side       Size(bytes)  Start(byte addr)  Expect Errors?

		{ PCI,       64,          0x0000,           MUSTpass         },	// 0x0
		{ Local,     64,          0x0040,           MUSTpass         },	// 0x1
		{ PCI,       64,          0x0080,           ERRORSok         },	// 0x2

		{ Local,     60,          0x00c0,           MUSTpass         },	// 0x3
		{ Unused,     4,          0x00fc,           MUSTpass         },	// 0x4
		{ PCI,       60,          0x0100,           MUSTpass         },	// 0x5
		{ Unused,     4,          0x013c,           MUSTpass         },	// 0x6
		{ Local,     60,          0x0140,           MUSTpass         },	// 0x7
		{ Unused,     4,          0x017c,           MUSTpass         },	// 0x8
		{ PCI,        4,          0x0180,           MUSTpass         },	// 0x9

		{ Unused,    52,          0x0184,           MUSTpass         },	// 0xa

		{ Local,      4,          0x01b8,           MUSTpass         },	// 0xb
		{ Unused,     4,          0x01bc,           MUSTpass         },	// 0xc
		{ PCI,        4,          0x01c0,           MUSTpass         },	// 0xd
		{ Unused,    52,          0x01c4,           MUSTpass         },	// 0xe
		{ Local,      4,          0x01f8,           MUSTpass         },	// 0xf
		{ Unused,     4,          0x01fc,           MUSTpass         },	// 0x10
		{ PCI,        4,          0x0200,           MUSTpass         },	// 0x11

		{ Unused,   508,          0x0204,           MUSTpass         },	// 0x12

		{ Local,   1028,          0x0400,           MUSTpass         },	// 0x13
		{ Unused,   892,          0x0804,           MUSTpass         },	// 0x14
		{ PCI,      128,          0x0b80,           MUSTpass         },	// 0x15
		// { Unused,  0,          0xxxxx,           MUSTpass         },
		{ Local,     60,          0x0c00,           MUSTpass         },	// 0x16
		{ Unused,     4,          0x0c3c,           MUSTpass         },	// 0x17
		{ PCI,       60,          0x0c40,           MUSTpass         },	// 0x18
		{ Unused,     4,          0x0c7c,           MUSTpass         },	// 0x19
		{ Local,     60,          0x0c80,           MUSTpass         },	// 0x1a
		{ Unused,     4,          0x0cbc,           MUSTpass         },	// 0x1b
		{ PCI,        4,          0x0cc0,           MUSTpass         },	// 0x1c

		{ Unused,  1204,          0x0cc4,           MUSTpass         },	// 0x1d

		{ Local,      4,          0x1178,           MUSTpass         },	// 0x1e
		{ Unused,     4,          0x117c,           MUSTpass         },	// 0x1f
		{ PCI,        4,          0x1180,           MUSTpass         },	// 0x20
		{ Unused,    52,          0x1184,           MUSTpass         },	// 0x21
		{ Local,      4,          0x11b8,           MUSTpass         },	// 0x22
		{ Unused,     4,          0x11bc,           MUSTpass         },	// 0x23
		{ PCI,        4,          0x11c0,           MUSTpass         },	// 0x24

		{ Unused,   188,          0x11c4,           MUSTpass         },	// 0x25

		{ Local,    124,          0x1280,           MUSTpass         }, // 0x26
		{ Unused,     4,          0x12fc,           MUSTpass         },
		{ PCI,      124,          0x1300,           MUSTpass         },
		{ Unused,     4,          0x137c,           MUSTpass         },
		{ Local,    124,          0x1380,           MUSTpass         },	
		{ Unused,     4,          0x13fc,           MUSTpass         },	

		{ PCI,     1028,          0x1400,           MUSTpass         },	
		{ Unused,   892,          0x1804,           MUSTpass         },	
		{ Local,    128,          0x1b80,           MUSTpass         },	

		{ Unused,    56,          0x1c00,           MUSTpass         },	

		{ PCI,        4,          0x1c38,           MUSTpass         },	
		{ Unused,     4,          0x1c3c,           MUSTpass         },	
		{ Local,      4,          0x1c40,           MUSTpass         },	
		{ Unused,    52,          0x1c44,           MUSTpass         },
		{ PCI,        4,          0x1c78,           MUSTpass         },
		{ Unused,     4,          0x1c7c,           MUSTpass         },
		{ Local,      4,          0x1c80,           MUSTpass         },

		{ Unused,   700,          0x1c84,           MUSTpass         },

		{ PCI,       64,          0x1f40,           MUSTpass         },
		{ Local,     64,          0x1f80,           MUSTpass         },
		{ PCI,       64,          0x1fc0,           ERRORSok         },


       //  The second half of the Shared Mem...
       // Side       Size(bytes)  Start(byte addr)  Expect Errors?
		{ Local,     64,          0x2000,           MUSTpass         },
		{ PCI,       64,          0x2040,           ERRORSok         },
		{ Local,     60,          0x2080,           MUSTpass         },
		{ Unused,     4,          0x20bc,           MUSTpass         },

		{ PCI,       60,          0x20c0,           MUSTpass         },
		{ Unused,     4,          0x20fc,           MUSTpass         },
		{ Local,     60,          0x2100,           MUSTpass         },
		{ Unused,     4,          0x213c,           MUSTpass         },
		{ PCI,       60,          0x2140,           MUSTpass         },
		{ Unused,     4,          0x217c,           MUSTpass         },
		{ Local,      4,          0x2180,           MUSTpass         },

		{ Unused,    52,          0x2184,           MUSTpass         },

		{ PCI,        4,          0x21b8,           MUSTpass         },
		{ Unused,     4,          0x21bc,           MUSTpass         },
		{ Local,      4,          0x21c0,           MUSTpass         },
		{ Unused,    52,          0x21c4,           MUSTpass         },
		{ PCI,        4,          0x21f8,           MUSTpass         },
		{ Unused,     4,          0x21fc,           MUSTpass         },
		{ Local,      4,          0x2200,           MUSTpass         },

		{ Unused,   508,          0x2204,           MUSTpass         },

		{ PCI,     1028,          0x2400,           MUSTpass         },
		{ Unused,   892,          0x2804,           MUSTpass         },
		{ Local,    124,          0x2b80,           MUSTpass         },
		{ Unused,     4,          0x2bfc,           MUSTpass         },

		{ PCI,       60,          0x2c00,           MUSTpass         },
		{ Unused,     4,          0x2c3c,           MUSTpass         },
		{ Local,     60,          0x2c40,           MUSTpass         },
		{ Unused,     4,          0x2c7c,           MUSTpass         },
		{ PCI,       60,          0x2c80,           MUSTpass         },
		{ Unused,     4,          0x2cbc,           MUSTpass         },
		{ Local,      4,          0x2cc0,           MUSTpass         },

		{ Unused,  1204,          0x2cc4,           MUSTpass         },

		{ PCI,        4,          0x3178,           MUSTpass         },
		{ Unused,     4,          0x317c,           MUSTpass         },
		{ Local,      4,          0x3180,           MUSTpass         },
		{ Unused,    52,          0x3184,           MUSTpass         },
		{ PCI,        4,          0x31b8,           MUSTpass         },
		{ Unused,     4,          0x31bc,           MUSTpass         },
		{ Local,      4,          0x31c0,           MUSTpass         },

		{ Unused,   188,          0x31c4,           MUSTpass         },

		{ PCI,      124,          0x3280,           MUSTpass         },
		{ Unused,     4,          0x32fc,           MUSTpass         },
		{ Local,    124,          0x3300,           MUSTpass         },
		{ Unused,     4,          0x337c,           MUSTpass         },
		{ PCI,      124,          0x3380,           MUSTpass         },
		{ Unused,     4,          0x33fc,           MUSTpass         },

		{ Local,   1028,          0x3400,           MUSTpass         },
		{ Unused,   892,          0x3804,           MUSTpass         },
		{ PCI,      128,          0x3b80,           MUSTpass         },

		{ Unused,    56,          0x3c00,           MUSTpass         },

		{ Local,      4,          0x3c38,           MUSTpass         },
		{ Unused,     4,          0x3c3c,           MUSTpass         },
		{ PCI,        4,          0x3c40,           MUSTpass         },
		{ Unused,    52,          0x3c44,           MUSTpass         },
		{ Local,      4,          0x3c78,           MUSTpass         },
		{ Unused,     4,          0x3c7c,           MUSTpass         },
		{ PCI,        4,          0x3c80,           MUSTpass         },

		{ Unused,   700,          0x3c84,           MUSTpass         },

		{ Local,     64,          0x3f40,           MUSTpass         },
		{ PCI,       64,          0x3f80,           ERRORSok         },
		{ Local,     64,          0x3fc0,           MUSTpass         },
};

DWORD NUMtestBLOCKS = sizeof(muthaBlock)/sizeof(muthaBlock[0]) ;

// Patterns
#define LOCALduringTEST			0xA55A0000
#define PCIduringTEST			0x96690000
#define UNUSEDblockFROMlocal	0x3CC30000
#define UNUSEDblockFROMhost		0x12340000


////////////////////////////////////////////////////////

#pragma ghs section text=".ctext"		// All C code must be below this line. Any other C modules
										//  must include a similar pragmas.

// We need the pragma because the 860 ???




// Returns the IMMR (Internal Memory Map Register) of the 860
long get_immr (void)
{
	return (0);		// Future: can do assembly language to actually read the IMMR.
}

void delay (DWORD cnt)
{
	DWORD i;
	for ( i = 0 ; i < cnt ; i++)
	  ;
}

void writeLED (DWORD value, DWORD invoke_limit)
{
	////////////////////////////////////////////////////////////////////////
	// The CS3# is connected to the LED strobe, so every time we write to
	// the CS3# addresses, we write to the LED (for the VBoard 0x300000)
	////////////////////////////////////////////////////////////////////////
	long temp = value;

/*
	if (invoke_limit)
		if (temp > 0xF)
			temp = 0xF;		// Limit what we write to the LED to 0xF, but put the entire value onto the data bus.
*/
	*( (short *) (get_immr() + PADAT) ) = (temp << 4) & 0x00F0;  // Put value to PA port (shifting left into PA 8-11) so we can strobe into LED next.
	*LEDptr = value;			// Strobe the LED and puts value onto the data bus
								//  where we can conveniently look at value via a logic analyzer.
								//  This is useful, since the LED only displays up to 0xF.	
/*
	Here's the assembly code to do approximately the same thing...

	; Display value in r5 into the LED
	slwi	r5,r5,4			; Shift left into PA 8-11	
    sth     r5,PADAT(r4)	; Setup the A port data (goes to the LED)
    lis     r3,CS3_HI_BASE
    ori     r3,r3,0
    stw		r5,0(r3)   		; Strobe PA into the LED Display and other LEDs. For convenience, r5 is also strobed onto the data bus.
*/ 

}

// Just a convenient place to trigger the logic analyzer if an error occurs.
void errorHandler(long value)	// Value can be a value such as 'the bad value read'.  Not currently used.
{
	DWORD temp;

	errorCnt++;						// Here's *the* place where we bump the error counter.

	if ((errorCnt % 0x10) == 0)		// Counts up  1 2 3 4 5 6 7 8 9 A B C D E F 5 1 2 3 4 5 6...
	  	temp = 5;					// Substitute 5 for zeros.
	else 
		temp = errorCnt;

	writeLED(temp, FALSE);

	// Send the error code to the host.
	regp->lhdata = errorCnt;
}


void setLED (DWORD LEDnum, DWORD newState)
{
	short PAport;

	PAport = *( (short *) (get_immr() + PADAT) );		// Get current contents of PAport

	// LED 1 = 0x0004 bit
	// LED 2 = 0x0008 bit
	if (newState) 
		*( (short *) (get_immr() + PADAT) ) = PAport |  ( 1 << (1 + LEDnum) )  ;    // turn on one bit
	else
		*( (short *) (get_immr() + PADAT) ) = PAport & (~( 1 << (1 + LEDnum) ) ) ;	// turn off	one bit

	*LEDptr = PAport;			// Strobe the LED and put new PAport value onto the data bus
}


long aliveLEDstate = 0;
#define ALIVE_LED	2

void indicateAlive(void)
{
	DWORD count, temp;

	if (aliveLEDstate)
	{
		setLED (ALIVE_LED, 0);
		aliveLEDstate = 0;
	}
	else
	{
		setLED (ALIVE_LED, 1);
		aliveLEDstate = 1;
	}


/*
	// Wait loop.  Required only for tests that run too fast to see the alive LED flashing.
	for (count = 0 ; count < 100000 ; count++) 
		temp = 0x11223344;
*/
}



#define	 SOFT_RESET 	0x2
// Put the 3042 into a known state.
void initialize(void)
{
	LEDvalue = 0;
	errorCnt = 0;
	writeLED (errorCnt, FALSE);

	// regp->hctl = SOFT_RESET;			
}


void waitDMAComplete(void)
{
	DWORD timeout, tempd;

	// Wait for the DMA complete bit to be set
#define loopsPerByte 0x1000		// Number of times through this 'while' loop per byte of DMA.
	timeout = 0x1000 * loopsPerByte;  // Give mucho time to complete.
	while ( ((regp->lint & DMAcompleteBit) != DMAcompleteBit) 
			&& timeout
		  )
		timeout--;

	if (timeout == 0)
	{
		errorHandler (0);
		// printf ("Error: timed out before DMAcompleteBit set (DMA completed). Errs=%d\n", errorCnt);
		return;
	}

	tempd = regp->lint;
	regp->lint = DMAcompleteBit;				// Clear the DMAcompleteBit. Is a Write One Clear bit !!!
	tempd = regp->lint;
}

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