main.c

来自「The Lite Evaluation/Demonstration Kit is」· C语言 代码 · 共 1,650 行 · 第 1/4 页

//
// testOpRegs
//
//
void testOpRegs (void)
{
	DWORD i;
	DWORD * regs = (DWORD *) CS1_BASE; // OpRegs are at 0 beyond CS1#

	unsigned char tempc, origLP;
	DWORD origDMACTL, tempd;


	for (i = 0 ; i < NUMopr3042 ; i++)
	{
		DWORD temp, orig;
		DWORD * theReg;
		DWORD theOMask  = opRegs3042[i].omask;	   // Copy to temp variables to make the code more readable.
		DWORD theZMask  = opRegs3042[i].zmask;
		char * theText  = opRegs3042[i].text;
		DWORD theOffset = opRegs3042[i].offset;

		theReg = regs + (theOffset/4);  //  The /4 is to convert from byte offset
												   //  (as coded in opRegs3042 table)
												   //  to a DWORD offset.
		orig = *theReg;		// Get original.
		// writeLED(orig, FALSE);

		*theReg = 0xFFFFffff;					   // Attempt to write all ones.
		if ((temp = *theReg) != theOMask)	 	   // Read it back.
		{
			errorHandler (0);
			// printf (" Bad %s: WR 0xFFFFffff  RD %08x  Should RD %08x  Errs %d\n", 
			//			  theText,              temp,           theMask,   errorCnt);
		}

		*theReg = 0;							  // Attempt to write all zeros.
		if ((temp = *theReg) != theZMask)		  // Read it back.
		{
			errorHandler (0);
			// printf (" Bad %s: WR 0  RD %08x  Should RD 0  Errs %d\n",
			// 	          theText,     temp,                   errorCnt);
		}

		*theReg = orig;							  // Attempt to restore original.
		if ((temp = *theReg) != orig)			  // Read it back.
		{
			if (theOffset == 0x4E4)   // Offset for the HINT.  The restoration of the HINT is different from the original, because:
									  //   1. We kicked off several DMAs below.
									  //   2. The DMA completed (almost immediately), which set the DMA Complete bit in the HINT (0x20).
									  //   3. Then, on the next entry to this test, the Write all Ones above cleared the DMA Complete bit.
			{
				if (temp != 0x00000018)
				{
					errorHandler (0);
					// printf (" Bad %s: WR %08x  RD %08x  Should RD %08x  Errs %d\n",
					//	          theText, orig,  temp,           orig,      errorCnt);
				}
			}
			else
			{
				errorHandler (0);
				// printf (" Bad %s: WR %08x  RD %08x  Should RD %08x  Errs %d\n",
				//	          theText, orig,  temp,           orig,      errorCnt);
			}
		}

	}  // end for each record in opRegs3042 table

	// printf ("\n");

	// DMA test
	// Test arbitration bits.


	// Alternate test of LP bits:
	//   DWORD write the DMACTL, but first set up the DMA so it is relatively
	//   harmless when it gets kicked off.

	regp->dmasize  = 0;			          // This is as small as we can go, but still moves 1 DWORD when DMA is kicked off.
	regp->dmahbase = 0xFFBD8000 + 0x4000;   // Point the DMA at the Shared Mem of the 3042 card *not* on the extender.
	regp->dmalbase = 0;	                  // Point at the base of our SRAM.

	origDMACTL = regp->dmactl_v.dmactl_dword;	// Get the original.

	regp->dmactl_v.dmactl_dword = 0;			// Write all zeros. This kicks off the DMA setup above.
	tempd = regp->dmactl_v.dmactl_dword;		// Read it back.
	if (tempd != 0)
	{
		errorHandler (0);
	}

	regp->dmactl_v.dmactl_dword = 0xFFFFffff;	// Write all ones. This kicks off the DMA setup above.
	tempd = regp->dmactl_v.dmactl_dword;		// Read it back.
	if (tempd != 0x00000203)				    // L, PF and W bits set.
	{
		errorHandler (0);
	}

	regp->dmactl_v.dmactl_dword = origDMACTL;	// Write original. This kicks off the DMA setup above.
	tempd = regp->dmactl_v.dmactl_dword;		// Read it back.
	if (tempd != origDMACTL)
	{
		errorHandler (0);
	}


/*
	Original test: byte writes to the DMACTL.
#define  LBIT   ( 0x2 )
#define  PBIT   ( 0x1 )

	origLP = regp->dmactl_v.dmactl_bytes[1];	// Get the original value.

	// Write all ones to the LP byte.  The L bit should set.  The P bit should not change state.		
	regp->dmactl_v.dmactl_bytes[1] = 0xFF;
	tempc = regp->dmactl_v.dmactl_bytes[1];	 // Read it back.

	if ( !(((tempc & LBIT) == LBIT) && ((tempc & PBIT) == (origLP & PBIT))) )
	{
		errorHandler (0);
		// printf ("  dmactl LP bits - P bit should be set. Read %02x. Should be 01. Errs=%d\n",
		//		                                                  tempc,                   errorCnt);
	}

	// Write all zeros to the LP byte.  The L bit should reset.  The P bit should not change state.		
	regp->dmactl_v.dmactl_bytes[1] = 0;
	tempc = regp->dmactl_v.dmactl_bytes[1];	  // Read it back.

	if ( !(((tempc & LBIT) == 0) && ((tempc & PBIT) == (origLP & PBIT))) )
	{
		errorHandler (0);
		// printf ("  dmactl LP bits - P bit should be reset. Read %02x. Should be 00. Errs=%d\n",
		//		                                                    tempc,                   errorCnt);
	}
*/

}  // end testOpRegs



//
// testDMA
//
//
void testDMA (void)
{
	DWORD i;

	DWORD SMtstBlkSz = SHAREDMEMregionsize;
	DWORD SMoffset = CS1_BASE + SHAREDMEMregionoffset;

	struct op_regs_struct_42_t * regp = (struct op_regs_struct_42_t *) (CS1_BASE + OP_REGS_BASE_42);
	unsigned char tempc, origLP;
	DWORD origDMACTL, tempd;

	// First, test data moving from the 3042 to host memory.

	const DWORD patternStart = 0;
	const DWORD patternLen = 0x4000;	// In bytes.

#define physAddrMsk  ( 0xFFFFf000 )		// Mask in bits 12 to 31.

	const DWORD directionToHost = 1;
	const DWORD directionTo3042 = 0;

	tempd = regp->dmactl_v.dmactl_dword;		// Read the original DMACTL (debug).

	tempd = regp->lint;
	regp->lint = DMAcompleteBit;				// Clear the DMAcompleteBit. Is a Write One Clear bit !!!
	tempd = regp->lint;
	
		// Write an address pattern to shared mem.
	// Check the non-complement.
	for (i = 0; i < SMtstBlkSz/4; i++)		// Write address pattern
	{
		((long *) SMoffset)[i] = ( i | (i << 12) | (i << 24) );
	}

	for (i = 0; i < SMtstBlkSz/4; i++)		// Read and check address pattern
	{
		DWORD dRead, dWrote;

		dWrote = i | (i << 12) | (i << 24);
		if ( (dRead = ((long *) SMoffset)[i]) != dWrote)
		{
			errorHandler (0);
			// printf ("R%08xW%08x ", dRead, dWrote);
			// if (errorCnt % 4 == 0)
			//	printf ("\n");
		}
	}

	// Shared Mem address into DMALBASE register. 
	//  (points to the start of the address pattern in 3042's shared mem).
	regp->dmalbase = patternStart;	// Give it a byte address, but because dmalbase bits 0 and 1 are dead,
									// loads a DWORD address.

	// Init DMASIZE.
	regp->dmasize = patternLen - 0x4;  // Give it a byte size,  Also, the value written to DMASIZE register
									   // must be reduced by one DWORD.

	// Init DMAHBASE register.
	regp->dmahbase = 0xFFBD8000 + 0x4000;   // Point the DMA at the Shared Mem of the 3042 card *not* on the extender.

	// Check to make sure that the DMA complete bit is not already set 
	//  (not normally required, but part of a resonable test).
	if (regp->lint & DMAcompleteBit)
	{
		errorHandler (0);
		// printf ("Error: DMAcompleteBit should not be set. Errs=%d\n", errorCnt);
	}

	// Write low-order byte of DMACTL to KICK OFF the DMA. 
	regp->dmactl_v.dmactl_dword = 0x200 | directionToHost;   // Claim Local ownership and kick off the DMA.	// Temp ???
/*	regp->dmactl_v.dmactl_bytes[0] = directionToHost;	// 3042 DMA grabs the PCI bus and moves the data from
														//   3042 Shared Mem to host mem
*/

/*
	// In theory, a delay here should should improve performance by having us do our first poll
	//  of the DMAcompleteBit just after the DMA completes.  However, because of host bridge oddities,
	//  this delay doesn't help.  
	for (i = 0 ; i < patternLen ; i++)		// Delay a bit before we start polling the DMA complete bit.
												//  (*not* required, but improves performance slightly).
		;
*/
	
	waitDMAComplete();

	for (i = 0; i < SMtstBlkSz/4; i++)		// Write a pattern which is *not* our address pattern
		((long *) SMoffset)[i] = 0xBAD42BAD;


	regp->dmalbase = patternStart;	// Give it a byte address, but because dmalbase bits 0 and 1 are dead,
									// loads a DWORD address.

	// Init DMASIZE.
	regp->dmasize = patternLen - 4;		// Give it a DWORD size,  Also, the value written to DMASIZE register
									// must be reduced by one DWORD.

	// Init DMAHBASE register.
	regp->dmahbase = 0xFFBD8000 + 0x4000;   // Point the DMA at the Shared Mem of the 3042 card *not* on the extender.

	// Check to make sure that the DMA complete bit is not already set 
	//  (not normally required, but part of a resonable test).
	if (regp->lint & DMAcompleteBit)
	{
		errorHandler (0);
		// printf ("Error: DMAcompleteBit should not be set. Errs=%d\n", errorCnt);
	}

	// Write low-order byte of DMACTL to KICK OFF the DMA. 
	regp->dmactl_v.dmactl_dword = 0x200 | directionTo3042;   // Claim Local ownership and kick off the DMA.	// Temp ???

	waitDMAComplete();

	for (i = 0; i < SMtstBlkSz/4; i++)		// Read and check address pattern
	{
		DWORD dRead, dWrote;
		 
		dWrote = i | (i << 12) | (i << 24);
		if ( (dRead = ((long *) SMoffset)[i]) != dWrote)
		{
			errorHandler (0);
			// printf ("R%08xW%08x ", dRead, dWrote);
			// if (errorCnt % 4 == 0)
			//	printf ("\n");
		}
	}

}  // end testDMA



//
// testSharedMem
//
DWORD testSharedMem (void)
{
	DWORD SMtstBlkSz;
	DWORD SMoffset;
	DWORD i, dRead, dWrote;

	SMtstBlkSz = SHAREDMEMregionsize;	    // in bytes.
	SMoffset = CS1_BASE + SHAREDMEMregionoffset  ;		// Offset from start of 860 access space

	// printf ("Running Address test.\n");

	// Write and test complement first.
	// if (errorCnt > 0)
	// 	printf ("\n");
	// printf ("Running Address Complement test.\n");

	for (i = 0; i < SMtstBlkSz/4; i++)		// Write address pattern
		((long *) SMoffset)[i] = ~(i | (i << 12) | (i << 24));

	for (i = 0; i < SMtstBlkSz/4; i++)		// Read and check address pattern
	{
		dWrote = ~(i | (i << 12) | (i << 24) );
		if ( (dRead = ((long *) SMoffset)[i]) != dWrote)
		{
			errorHandler (0);
		}
	}

	// Check the non-complement.
	for (i = 0; i < SMtstBlkSz/4; i++)		// Write address pattern
	{
		((long *) SMoffset)[i] = ( i | (i << 12) | (i << 24) );
	}

	for (i = 0; i < SMtstBlkSz/4; i++)		// Read and check address pattern
	{
		dWrote = i | (i << 12) | (i << 24);
		if ( (dRead = ((long *) SMoffset)[i]) != dWrote)
		{
			errorHandler (0);
		}
	}

}    // end testSharedMem


//
// testSharedMemWithHost
//
//  860 bangs on 1st half of Shared Mem, while host bangs on the 2nd half.
//  Doesn't write 0xFFFFffff or 0.
DWORD testSharedMemWithHost (void)
{
	DWORD SMtstBlkSz;
	DWORD SMoffset;
	DWORD i, dRead, dWrote;

	SMtstBlkSz = SHAREDMEMregionsize/2;	    // in bytes.
	SMoffset = CS1_BASE + SHAREDMEMregionoffset  ;		// Offset from start of 860 access space

	// printf ("Running Address test.\n");

	// Write and test complement first.
	// if (errorCnt > 0)
	// 	printf ("\n");
	// printf ("Running Address Complement test.\n");

	for (i = 0; i < SMtstBlkSz/4; i++)		// Write address pattern
	{
		dWrote = ~(i | (i << 12) | (i << 24));
		if (dWrote == 0xFFFFffff)
			dWrote = 0xAA55AA55;
		if (dWrote == 0)
			dWrote = 0x12345678;
		((long *) SMoffset)[i] = dWrote;
	}

	for (i = 0; i < SMtstBlkSz/4; i++)		// Read and check address pattern
	{
		dWrote = ~(i | (i << 12) | (i << 24) );
		if (dWrote == 0xFFFFffff)
			dWrote = 0xAA55AA55;
		if (dWrote == 0)
			dWrote = 0x12345678;

		if ( (dRead = ((long *) SMoffset)[i]) != dWrote)
		{
			errorHandler (0);
		}
	}

	// Check the non-complement.
	for (i = 0; i < SMtstBlkSz/4; i++)		// Write address pattern
	{
		dWrote = (i | (i << 12) | (i << 24));
		if (dWrote == 0xFFFFffff)
			dWrote = 0xAA55AA55;
		if (dWrote == 0)
			dWrote = 0x12345678;
		((long *) SMoffset)[i] = dWrote;
	}

	for (i = 0; i < SMtstBlkSz/4; i++)		// Read and check address pattern
	{
		dWrote = (i | (i << 12) | (i << 24) );
		if (dWrote == 0xFFFFffff)
			dWrote = 0xAA55AA55;
		if (dWrote == 0)
			dWrote = 0x12345678;

		if ( (dRead = ((long *) SMoffset)[i]) != dWrote)
		{
			errorHandler (0);
		}
	}

}    // end testSharedMemWithHost



//
// testSharedMemWithHost_W2
//
//  860 only reads just before the end of the first half of Shared Mem.
DWORD testSharedMemWithHost_W2 (void)
{
	DWORD SMtstBlkSz;
	DWORD SMoffset;
	DWORD i, dRead, dWrote;

	SMtstBlkSz = SHAREDMEMregionsize/2;	    // in bytes.
	SMoffset = CS1_BASE + SHAREDMEMregionoffset  ;		// Offset from start of 860 access space