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📄 tcm0201.map.qmsg

📁 在公司做的TCM编解码程序
💻 QMSG
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Aug 20 16:07:59 2007 " "Info: Processing started: Mon Aug 20 16:07:59 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off TCM0201 -c TCM0201 " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off TCM0201 -c TCM0201" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "fenpin_36.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file fenpin_36.v" { { "Info" "ISGN_ENTITY_NAME" "1 fenpin_36 " "Info: Found entity 1: fenpin_36" {  } { { "fenpin_36.v" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/fenpin_36.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "bus2line.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file bus2line.v" { { "Info" "ISGN_ENTITY_NAME" "1 bus2line " "Info: Found entity 1: bus2line" {  } { { "bus2line.v" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/bus2line.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "parallel_series.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file parallel_series.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 parallel_series-behave " "Info: Found design unit 1: parallel_series-behave" {  } { { "parallel_series.vhd" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/parallel_series.vhd" 13 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 parallel_series " "Info: Found entity 1: parallel_series" {  } { { "parallel_series.vhd" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/parallel_series.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "series_parallel.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file series_parallel.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 series_parallel-behave " "Info: Found design unit 1: series_parallel-behave" {  } { { "series_parallel.vhd" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/series_parallel.vhd" 14 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 series_parallel " "Info: Found entity 1: series_parallel" {  } { { "series_parallel.vhd" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/series_parallel.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "change.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file change.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 change " "Info: Found entity 1: change" {  } { { "change.bdf" "" { Schematic "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/change.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "DIDQ.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file DIDQ.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 DIDQ-behave " "Info: Found design unit 1: DIDQ-behave" {  } { { "DIDQ.vhd" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/DIDQ.vhd" 13 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 DIDQ " "Info: Found entity 1: DIDQ" {  } { { "DIDQ.vhd" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/DIDQ.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "3IN1.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file 3IN1.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 3IN1 " "Info: Found entity 1: 3IN1" {  } { { "3IN1.bdf" "" { Schematic "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/3IN1.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "TCM0201.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file TCM0201.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 TCM0201 " "Info: Found entity 1: TCM0201" {  } { { "TCM0201.bdf" "" { Schematic "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/TCM0201.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "DEVIDE.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file DEVIDE.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 DEVIDE " "Info: Found entity 1: DEVIDE" {  } { { "DEVIDE.bdf" "" { Schematic "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/DEVIDE.bdf" { } } }  } 0}  } {  } 0}
{ "Warning" "WVRFX_VERI_XZ_EXTEND_SIGNIFICANT" "para_out12.v(17) " "Warning: (10273) Verilog HDL warning at para_out12.v(17): extended using \"x\" or \"z\"" {  } { { "para_out12.v" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/para_out12.v" 17 0 0 } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "para_out12.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file para_out12.v" { { "Info" "ISGN_ENTITY_NAME" "1 para_out12 " "Info: Found entity 1: para_out12" {  } { { "para_out12.v" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/para_out12.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "seri_para.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file seri_para.v" { { "Info" "ISGN_ENTITY_NAME" "1 seri_para " "Info: Found entity 1: seri_para" {  } { { "seri_para.v" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/seri_para.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "fs_out3.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file fs_out3.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 fs_out3-behave " "Info: Found design unit 1: fs_out3-behave" {  } { { "fs_out3.vhd" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/fs_out3.vhd" 13 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 fs_out3 " "Info: Found entity 1: fs_out3" {  } { { "fs_out3.vhd" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/fs_out3.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "series_para_store.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file series_para_store.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 series_para_store-behave " "Info: Found design unit 1: series_para_store-behave" {  } { { "series_para_store.vhd" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/series_para_store.vhd" 14 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 series_para_store " "Info: Found entity 1: series_para_store" {  } { { "series_para_store.vhd" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/series_para_store.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "parallel_12out.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file parallel_12out.v" { { "Info" "ISGN_ENTITY_NAME" "1 parallel_12out " "Info: Found entity 1: parallel_12out" {  } { { "parallel_12out.v" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/parallel_12out.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "count.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file count.v" { { "Info" "ISGN_ENTITY_NAME" "1 count " "Info: Found entity 1: count" {  } { { "count.v" "" { Text "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/count.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "TCM0201 " "Info: Elaborating entity \"TCM0201\" for the top level hierarchy" {  } {  } 0}
{ "Warning" "WGDFX_PRIMITIVE_IGNORED" "NOT inst15 " "Warning: Primitive \"NOT\" of instance \"inst15\" not used" {  } { { "TCM0201.bdf" "" { Schematic "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/TCM0201.bdf" { { 840 2480 2528 872 "inst15" "" } } } }  } 0}
{ "Warning" "WGDFX_PRIMITIVE_IGNORED" "NOT inst16 " "Warning: Primitive \"NOT\" of instance \"inst16\" not used" {  } { { "TCM0201.bdf" "" { Schematic "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/TCM0201.bdf" { { 768 2680 2728 800 "inst16" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "DEVIDE DEVIDE:inst5 " "Info: Elaborating entity \"DEVIDE\" for hierarchy \"DEVIDE:inst5\"" {  } { { "TCM0201.bdf" "inst5" { Schematic "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/TCM0201.bdf" { { 168 -16 136 488 "inst5" "" } } } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "f:/altera/quartus50/libraries/others/maxplus2/74393.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file f:/altera/quartus50/libraries/others/maxplus2/74393.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 74393 " "Info: Found entity 1: 74393" {  } { { "74393.bdf" "" { Schematic "f:/altera/quartus50/libraries/others/maxplus2/74393.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "74393 DEVIDE:inst5\|74393:176 " "Info: Elaborating entity \"74393\" for hierarchy \"DEVIDE:inst5\|74393:176\"" {  } { { "DEVIDE.bdf" "176" { Schematic "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/DEVIDE.bdf" { { 496 2640 2760 672 "176" "" } } } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "f:/altera/quartus50/libraries/others/maxplus2/7492.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file f:/altera/quartus50/libraries/others/maxplus2/7492.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 7492 " "Info: Found entity 1: 7492" {  } { { "7492.bdf" "" { Schematic "f:/altera/quartus50/libraries/others/maxplus2/7492.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "7492 DEVIDE:inst5\|7492:inst " "Info: Elaborating entity \"7492\" for hierarchy \"DEVIDE:inst5\|7492:inst\"" {  } { { "DEVIDE.bdf" "inst" { Schematic "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/DEVIDE.bdf" { { 672 3528 3632 768 "inst" "" } } } }  } 0}
{ "Info" "ISGN_SEARCH_FILE" "CODEandIE.bdf 1 1 " "Info: Using design file CODEandIE.bdf, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 CODEandIE " "Info: Found entity 1: CODEandIE" {  } { { "CODEandIE.bdf" "" { Schematic "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/CODEandIE.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CODEandIE CODEandIE:inst2 " "Info: Elaborating entity \"CODEandIE\" for hierarchy \"CODEandIE:inst2\"" {  } { { "TCM0201.bdf" "inst2" { Schematic "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/TCM0201.bdf" { { 104 920 1032 392 "inst2" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PORT" "A 74161 inst18 " "Warning: Port \"A\" of type 74161 and instance \"inst18\" is missing source signal" {  } { { "CODEandIE.bdf" "" { Schematic "E:/project/VB编译码程序可用070214/VB编码程序(CPLD1模块)/TCM070119/CODEandIE.bdf" { { 728 688 808 912 "inst18" "" } } } }  } 0}

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