tcm0201.map.eqn

在公司做的TCM编解码程序

--M1_parallel[14] is change:inst4|series_parallel:inst1|parallel[14]
M1_parallel[14]_or_out = M1_rega[14];
M1_parallel[14]_reg_input = M1_parallel[14]_or_out;
M1_parallel[14] = DFFE(M1_parallel[14]_reg_input, FS_IN, , , );


--M1_parallel[13] is change:inst4|series_parallel:inst1|parallel[13]
M1_parallel[13]_or_out = M1_rega[13];
M1_parallel[13]_reg_input = M1_parallel[13]_or_out;
M1_parallel[13] = DFFE(M1_parallel[13]_reg_input, FS_IN, , , );


--M1_parallel[11] is change:inst4|series_parallel:inst1|parallel[11]
M1_parallel[11]_or_out = M1_rega[11];
M1_parallel[11]_reg_input = M1_parallel[11]_or_out;
M1_parallel[11] = DFFE(M1_parallel[11]_reg_input, FS_IN, , , );


--M1_parallel[7] is change:inst4|series_parallel:inst1|parallel[7]
M1_parallel[7]_or_out = M1_rega[7];
M1_parallel[7]_reg_input = M1_parallel[7]_or_out;
M1_parallel[7] = DFFE(M1_parallel[7]_reg_input, FS_IN, , , );


--M1_parallel[6] is change:inst4|series_parallel:inst1|parallel[6]
M1_parallel[6]_or_out = M1_rega[6];
M1_parallel[6]_reg_input = M1_parallel[6]_or_out;
M1_parallel[6] = DFFE(M1_parallel[6]_reg_input, FS_IN, , , );


--M1_parallel[5] is change:inst4|series_parallel:inst1|parallel[5]
M1_parallel[5]_or_out = M1_rega[5];
M1_parallel[5]_reg_input = M1_parallel[5]_or_out;
M1_parallel[5] = DFFE(M1_parallel[5]_reg_input, FS_IN, , , );


--M1_parallel[4] is change:inst4|series_parallel:inst1|parallel[4]
M1_parallel[4]_or_out = M1_rega[4];
M1_parallel[4]_reg_input = M1_parallel[4]_or_out;
M1_parallel[4] = DFFE(M1_parallel[4]_reg_input, FS_IN, , , );


--M1_parallel[3] is change:inst4|series_parallel:inst1|parallel[3]
M1_parallel[3]_or_out = M1_rega[3];
M1_parallel[3]_reg_input = M1_parallel[3]_or_out;
M1_parallel[3] = DFFE(M1_parallel[3]_reg_input, FS_IN, , , );


--M1_parallel[0] is change:inst4|series_parallel:inst1|parallel[0]
M1_parallel[0]_or_out = M1_rega[0];
M1_parallel[0]_reg_input = M1_parallel[0]_or_out;
M1_parallel[0] = DFFE(M1_parallel[0]_reg_input, FS_IN, , , );


--M1_parallel[10] is change:inst4|series_parallel:inst1|parallel[10]
M1_parallel[10]_or_out = M1_rega[10];
M1_parallel[10]_reg_input = M1_parallel[10]_or_out;
M1_parallel[10] = DFFE(M1_parallel[10]_reg_input, FS_IN, , , );


--M1_parallel[2] is change:inst4|series_parallel:inst1|parallel[2]
M1_parallel[2]_or_out = M1_rega[2];
M1_parallel[2]_reg_input = M1_parallel[2]_or_out;
M1_parallel[2] = DFFE(M1_parallel[2]_reg_input, FS_IN, , , );


--Q2_dffs[2] is series_para_store:inst19|lpm_counter:n_rtl_0|dffs[2]
Q2_dffs[2]_p1_out = Q2_dffs[0] & Q2_dffs[1];
Q2_dffs[2]_or_out = Q2_dffs[2]_p1_out;
Q2_dffs[2]_reg_input = Q2_dffs[2]_or_out;
Q2_dffs[2] = TFFE(Q2_dffs[2]_reg_input, !D1_inst2, !L1_fs, , );


--L1L7 is change:inst4|parallel_series:inst|digit[6]~116
L1L7_p1_out = M1_parallel[12] & FS_IN;
L1L7_p2_out = !FS_IN & L1L7;
L1L7_p3_out = M1_parallel[12] & L1L7;
L1L7_or_out = L1L7_p1_out # L1L7_p2_out # L1L7_p3_out;
L1L7 = L1L7_or_out;


--L1L5 is change:inst4|parallel_series:inst|digit[4]~120
L1L5_p1_out = M1_parallel[8] & FS_IN;
L1L5_p2_out = !FS_IN & L1L5;
L1L5_p3_out = M1_parallel[8] & L1L5;
L1L5_or_out = L1L5_p1_out # L1L5_p2_out # L1L5_p3_out;
L1L5 = L1L5_or_out;


--L2L1 is change:inst4|parallel_series:inst5|digit[0]~116
L2L1_p1_out = M1_parallel[1] & FS_IN;
L2L1_p2_out = !FS_IN & L2L1;
L2L1_p3_out = M1_parallel[1] & L2L1;
L2L1_or_out = L2L1_p1_out # L2L1_p2_out # L2L1_p3_out;
L2L1 = L2L1_or_out;


--L2L5 is change:inst4|parallel_series:inst5|digit[4]~120
L2L5_p1_out = M1_parallel[9] & FS_IN;
L2L5_p2_out = !FS_IN & L2L5;
L2L5_p3_out = M1_parallel[9] & L2L5;
L2L5_or_out = L2L5_p1_out # L2L5_p2_out # L2L5_p3_out;
L2L5 = L2L5_or_out;


--L1L3 is change:inst4|parallel_series:inst|digit[2]~124
L1L3_p1_out = M1_parallel[4] & FS_IN;
L1L3_p2_out = !FS_IN & L1L3;
L1L3_p3_out = M1_parallel[4] & L1L3;
L1L3_or_out = L1L3_p1_out # L1L3_p2_out # L1L3_p3_out;
L1L3 = L1L3_or_out;


--L1L4 is change:inst4|parallel_series:inst|digit[3]~128
L1L4_p1_out = M1_parallel[6] & FS_IN;
L1L4_p2_out = !FS_IN & L1L4;
L1L4_p3_out = M1_parallel[6] & L1L4;
L1L4_or_out = L1L4_p1_out # L1L4_p2_out # L1L4_p3_out;
L1L4 = L1L4_or_out;


--L1L1 is change:inst4|parallel_series:inst|digit[0]~132
L1L1_p1_out = M1_parallel[0] & FS_IN;
L1L1_p2_out = !FS_IN & L1L1;
L1L1_p3_out = M1_parallel[0] & L1L1;
L1L1_or_out = L1L1_p1_out # L1L1_p2_out # L1L1_p3_out;
L1L1 = L1L1_or_out;


--L1L8 is change:inst4|parallel_series:inst|digit[7]~136
L1L8_p1_out = M1_parallel[14] & FS_IN;
L1L8_p2_out = !FS_IN & L1L8;
L1L8_p3_out = M1_parallel[14] & L1L8;
L1L8_or_out = L1L8_p1_out # L1L8_p2_out # L1L8_p3_out;
L1L8 = L1L8_or_out;


--L1L01 is change:inst4|parallel_series:inst|digit[9]~140
L1L01_p1_out = M1_parallel[18] & FS_IN;
L1L01_p2_out = !FS_IN & L1L01;
L1L01_p3_out = M1_parallel[18] & L1L01;
L1L01_or_out = L1L01_p1_out # L1L01_p2_out # L1L01_p3_out;
L1L01 = L1L01_or_out;


--L1L21 is change:inst4|parallel_series:inst|digit[11]~144
L1L21_p1_out = M1_parallel[22] & FS_IN;
L1L21_p2_out = !FS_IN & L1L21;
L1L21_p3_out = M1_parallel[22] & L1L21;
L1L21_or_out = L1L21_p1_out # L1L21_p2_out # L1L21_p3_out;
L1L21 = L1L21_or_out;


--L1L9 is change:inst4|parallel_series:inst|digit[8]~148
L1L9_p1_out = M1_parallel[16] & FS_IN;
L1L9_p2_out = !FS_IN & L1L9;
L1L9_p3_out = M1_parallel[16] & L1L9;
L1L9_or_out = L1L9_p1_out # L1L9_p2_out # L1L9_p3_out;
L1L9 = L1L9_or_out;


--L1L11 is change:inst4|parallel_series:inst|digit[10]~152
L1L11_p1_out = M1_parallel[20] & FS_IN;
L1L11_p2_out = !FS_IN & L1L11;
L1L11_p3_out = M1_parallel[20] & L1L11;
L1L11_or_out = L1L11_p1_out # L1L11_p2_out # L1L11_p3_out;
L1L11 = L1L11_or_out;


--L2L3 is change:inst4|parallel_series:inst5|digit[2]~124
L2L3_p1_out = M1_parallel[5] & FS_IN;
L2L3_p2_out = !FS_IN & L2L3;
L2L3_p3_out = M1_parallel[5] & L2L3;
L2L3_or_out = L2L3_p1_out # L2L3_p2_out # L2L3_p3_out;
L2L3 = L2L3_or_out;


--L2L4 is change:inst4|parallel_series:inst5|digit[3]~128
L2L4_p1_out = M1_parallel[7] & FS_IN;
L2L4_p2_out = !FS_IN & L2L4;
L2L4_p3_out = M1_parallel[7] & L2L4;
L2L4_or_out = L2L4_p1_out # L2L4_p2_out # L2L4_p3_out;
L2L4 = L2L4_or_out;


--L2L2 is change:inst4|parallel_series:inst5|digit[1]~132
L2L2_p1_out = M1_parallel[3] & FS_IN;
L2L2_p2_out = !FS_IN & L2L2;
L2L2_p3_out = M1_parallel[3] & L2L2;
L2L2_or_out = L2L2_p1_out # L2L2_p2_out # L2L2_p3_out;
L2L2 = L2L2_or_out;


--L2L7 is change:inst4|parallel_series:inst5|digit[6]~136
L2L7_p1_out = M1_parallel[13] & FS_IN;
L2L7_p2_out = !FS_IN & L2L7;
L2L7_p3_out = M1_parallel[13] & L2L7;
L2L7_or_out = L2L7_p1_out # L2L7_p2_out # L2L7_p3_out;
L2L7 = L2L7_or_out;


--L2L8 is change:inst4|parallel_series:inst5|digit[7]~140
L2L8_p1_out = M1_parallel[15] & FS_IN;
L2L8_p2_out = !FS_IN & L2L8;
L2L8_p3_out = M1_parallel[15] & L2L8;
L2L8_or_out = L2L8_p1_out # L2L8_p2_out # L2L8_p3_out;
L2L8 = L2L8_or_out;


--L2L6 is change:inst4|parallel_series:inst5|digit[5]~144
L2L6_p1_out = M1_parallel[11] & FS_IN;
L2L6_p2_out = !FS_IN & L2L6;
L2L6_p3_out = M1_parallel[11] & L2L6;
L2L6_or_out = L2L6_p1_out # L2L6_p2_out # L2L6_p3_out;
L2L6 = L2L6_or_out;


--L2L01 is change:inst4|parallel_series:inst5|digit[9]~148
L2L01_p1_out = M1_parallel[19] & FS_IN;
L2L01_p2_out = !FS_IN & L2L01;
L2L01_p3_out = M1_parallel[19] & L2L01;
L2L01_or_out = L2L01_p1_out # L2L01_p2_out # L2L01_p3_out;
L2L01 = L2L01_or_out;


--L2L21 is change:inst4|parallel_series:inst5|digit[11]~152
L2L21_p1_out = M1_parallel[23] & FS_IN;
L2L21_p2_out = !FS_IN & L2L21;
L2L21_p3_out = M1_parallel[23] & L2L21;
L2L21_or_out = L2L21_p1_out # L2L21_p2_out # L2L21_p3_out;
L2L21 = L2L21_or_out;


--L2L9 is change:inst4|parallel_series:inst5|digit[8]~156
L2L9_p1_out = M1_parallel[17] & FS_IN;
L2L9_p2_out = !FS_IN & L2L9;
L2L9_p3_out = M1_parallel[17] & L2L9;
L2L9_or_out = L2L9_p1_out # L2L9_p2_out # L2L9_p3_out;
L2L9 = L2L9_or_out;


--L2L11 is change:inst4|parallel_series:inst5|digit[10]~160
L2L11_p1_out = M1_parallel[21] & FS_IN;
L2L11_p2_out = !FS_IN & L2L11;
L2L11_p3_out = M1_parallel[21] & L2L11;
L2L11_or_out = L2L11_p1_out # L2L11_p2_out # L2L11_p3_out;
L2L11 = L2L11_or_out;


--S1_temp[5] is 3IN12:inst7|fenpin_36:inst1|temp[5]
S1_temp[5]_p1_out = !S1_temp[4] & !S1_temp[3] & !S1_temp[2] & S1_temp[1] & S1_temp[5] & S1_temp[0];
S1_temp[5]_p2_out = S1_temp[4] & S1_temp[3] & S1_temp[2] & S1_temp[1] & S1_temp[0];
S1_temp[5]_or_out = S1_temp[5]_p1_out # S1_temp[5]_p2_out;
S1_temp[5]_reg_input = S1_temp[5]_or_out;
S1_temp[5] = TFFE(S1_temp[5]_reg_input, R2_3, , , );


--Q2_dffs[3] is series_para_store:inst19|lpm_counter:n_rtl_0|dffs[3]
Q2_dffs[3]_p1_out = Q2_dffs[2] & Q2_dffs[0] & Q2_dffs[1];
Q2_dffs[3]_or_out = Q2_dffs[3]_p1_out;
Q2_dffs[3]_reg_input = Q2_dffs[3]_or_out;
Q2_dffs[3] = TFFE(Q2_dffs[3]_reg_input, !D1_inst2, !L1_fs, , );


--L1L2 is change:inst4|parallel_series:inst|digit[1]~156
L1L2_p1_out = M1_parallel[2] & FS_IN;
L1L2_p2_out = !FS_IN & L1L2;
L1L2_p3_out = M1_parallel[2] & L1L2;
L1L2_or_out = L1L2_p1_out # L1L2_p2_out # L1L2_p3_out;
L1L2 = L1L2_or_out;


--L1L6 is change:inst4|parallel_series:inst|digit[5]~160
L1L6_p1_out = M1_parallel[10] & FS_IN;
L1L6_p2_out = !FS_IN & L1L6;
L1L6_p3_out = M1_parallel[10] & L1L6;
L1L6_or_out = L1L6_p1_out # L1L6_p2_out # L1L6_p3_out;
L1L6 = L1L6_or_out;


--S1_fsout is 3IN12:inst7|fenpin_36:inst1|fsout
S1_fsout_p1_out = S1_temp[5] & !S1_temp[4] & !S1_temp[3] & !S1_temp[2] & S1_temp[1] & S1_temp[0];
S1_fsout_or_out = S1_fsout_p1_out;
S1_fsout_reg_input = S1_fsout_or_out;
S1_fsout = DFFE(S1_fsout_reg_input, R2_3, , , );


--L2L41 is change:inst4|parallel_series:inst5|digit_out~12
L2L41_p0_out = L1_n[0] & !L1_n[1] & L2_n[3] & !L2_n[2] & !FS_IN & L2L01;
L2L41_p1_out = L2L7 & !L1_n[0] & L1_n[1] & !L2_n[3] & L2_n[2] & !FS_IN;
L2L41_p2_out = L1_n[0] & L1_n[1] & !L2_n[3] & L2_n[2] & !FS_IN & L2L8;
L2L41_p3_out = !L1_n[0] & !L1_n[1] & !L2_n[3] & L2_n[2] & !FS_IN & L2L5;
L2L41_p4_out = L1_n[0] & !L1_n[1] & !L2_n[3] & L2_n[2] & !FS_IN & L2L6;
L2L41_or_out = L2L61 # L2L41_p0_out # L2L41_p1_out # L2L41_p2_out # L2L41_p3_out # L2L41_p4_out;
L2L41 = L2L41_or_out;


--L2_digit_out is change:inst4|parallel_series:inst5|digit_out
L2_digit_out_p1_out = L2L51 & !L2L41;
L2_digit_out_or_out = L2_digit_out_p1_out;
L2_digit_out_reg_input = !(L2_digit_out_or_out);
L2_digit_out = DFFE(L2_digit_out_reg_input, !D1_inst2, , , );