tcm0201.fit.eqn

在公司做的TCM编解码程序

G3_rega[11]_reg_input = G3_rega[11]_or_out;
G3_rega[11] = TFFE(G3_rega[11]_reg_input, D1_inst2, , , );


--G1_parallel[11] is series_para_store:inst19|parallel[11] at LC248
G1_parallel[11]_or_out = G1_rega[11];
G1_parallel[11]_reg_input = G1_parallel[11]_or_out;
G1_parallel[11] = DFFE(G1_parallel[11]_reg_input, L1_fs, , , );


--G1_parallel[10] is series_para_store:inst19|parallel[10] at LC210
G1_parallel[10]_or_out = G1_rega[10];
G1_parallel[10]_reg_input = G1_parallel[10]_or_out;
G1_parallel[10] = DFFE(G1_parallel[10]_reg_input, L1_fs, , , );


--G1_parallel[9] is series_para_store:inst19|parallel[9] at LC36
G1_parallel[9]_or_out = G1_rega[9];
G1_parallel[9]_reg_input = G1_parallel[9]_or_out;
G1_parallel[9] = DFFE(G1_parallel[9]_reg_input, L1_fs, , , );


--G1_parallel[8] is series_para_store:inst19|parallel[8] at LC38
G1_parallel[8]_or_out = G1_rega[8];
G1_parallel[8]_reg_input = G1_parallel[8]_or_out;
G1_parallel[8] = DFFE(G1_parallel[8]_reg_input, L1_fs, , , );


--G1_parallel[7] is series_para_store:inst19|parallel[7] at LC46
G1_parallel[7]_or_out = G1_rega[7];
G1_parallel[7]_reg_input = G1_parallel[7]_or_out;
G1_parallel[7] = DFFE(G1_parallel[7]_reg_input, L1_fs, , , );


--G1_parallel[6] is series_para_store:inst19|parallel[6] at LC48
G1_parallel[6]_or_out = G1_rega[6];
G1_parallel[6]_reg_input = G1_parallel[6]_or_out;
G1_parallel[6] = DFFE(G1_parallel[6]_reg_input, L1_fs, , , );


--G1_parallel[5] is series_para_store:inst19|parallel[5] at LC47
G1_parallel[5]_or_out = G1_rega[5];
G1_parallel[5]_reg_input = G1_parallel[5]_or_out;
G1_parallel[5] = DFFE(G1_parallel[5]_reg_input, L1_fs, , , );


--G1_parallel[4] is series_para_store:inst19|parallel[4] at LC44
G1_parallel[4]_or_out = G1_rega[4];
G1_parallel[4]_reg_input = G1_parallel[4]_or_out;
G1_parallel[4] = DFFE(G1_parallel[4]_reg_input, L1_fs, , , );


--G1_parallel[3] is series_para_store:inst19|parallel[3] at LC244
G1_parallel[3]_or_out = G1_rega[3];
G1_parallel[3]_reg_input = G1_parallel[3]_or_out;
G1_parallel[3] = DFFE(G1_parallel[3]_reg_input, L1_fs, , , );


--G1_parallel[2] is series_para_store:inst19|parallel[2] at LC247
G1_parallel[2]_or_out = G1_rega[2];
G1_parallel[2]_reg_input = G1_parallel[2]_or_out;
G1_parallel[2] = DFFE(G1_parallel[2]_reg_input, L1_fs, , , );


--G1_parallel[1] is series_para_store:inst19|parallel[1] at LC254
G1_parallel[1]_or_out = G1_rega[1];
G1_parallel[1]_reg_input = G1_parallel[1]_or_out;
G1_parallel[1] = DFFE(G1_parallel[1]_reg_input, L1_fs, , , );


--G1_parallel[0] is series_para_store:inst19|parallel[0] at LC246
G1_parallel[0]_or_out = G1_rega[0];
G1_parallel[0]_reg_input = G1_parallel[0]_or_out;
G1_parallel[0] = DFFE(G1_parallel[0]_reg_input, L1_fs, , , );


--G2_rega[10] is series_para_store:inst22|rega[10] at LC52
G2_rega[10]_p0_out = C1_inst1 & C1_inst4 & Q2_dffs[1] & Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & G2_rega[10] & K1_8 & K1_9;
G2_rega[10]_p1_out = C1_inst1 & !C1_inst4 & Q2_dffs[1] & Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & !G2_rega[10];
G2_rega[10]_p2_out = !C1_inst1 & C1_inst4 & Q2_dffs[1] & Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & !G2_rega[10];
G2_rega[10]_p4_out = !C1_inst1 & !C1_inst4 & Q2_dffs[1] & Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & G2_rega[10] & K1_8 & K1_9;
G2_rega[10]_or_out = G2L63 # G2_rega[10]_p0_out # G2_rega[10]_p1_out # G2_rega[10]_p2_out # G2_rega[10]_p4_out;
G2_rega[10]_reg_input = G2_rega[10]_or_out;
G2_rega[10] = TFFE(G2_rega[10]_reg_input, D1_inst2, , , );


--G2_rega[9] is series_para_store:inst22|rega[9] at LC50
G2_rega[9]_p0_out = C1_inst1 & C1_inst4 & Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & !Q2_dffs[1] & G2_rega[9] & K1_8 & K1_9;
G2_rega[9]_p1_out = C1_inst1 & !C1_inst4 & Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & !Q2_dffs[1] & !G2_rega[9];
G2_rega[9]_p2_out = !C1_inst1 & C1_inst4 & Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & !Q2_dffs[1] & !G2_rega[9];
G2_rega[9]_p4_out = !C1_inst1 & !C1_inst4 & Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & !Q2_dffs[1] & G2_rega[9] & K1_8 & K1_9;
G2_rega[9]_or_out = G2L43 # G2_rega[9]_p0_out # G2_rega[9]_p1_out # G2_rega[9]_p2_out # G2_rega[9]_p4_out;
G2_rega[9]_reg_input = G2_rega[9]_or_out;
G2_rega[9] = TFFE(G2_rega[9]_reg_input, D1_inst2, , , );


--G2_rega[8] is series_para_store:inst22|rega[8] at LC18
G2_rega[8]_p0_out = C1_inst1 & C1_inst4 & !Q2_dffs[1] & Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & G2_rega[8] & K1_8 & K1_9;
G2_rega[8]_p1_out = C1_inst1 & !C1_inst4 & !Q2_dffs[1] & Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & !G2_rega[8];
G2_rega[8]_p2_out = !C1_inst1 & C1_inst4 & !Q2_dffs[1] & Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & !G2_rega[8];
G2_rega[8]_p4_out = !C1_inst1 & !C1_inst4 & !Q2_dffs[1] & Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & G2_rega[8] & K1_8 & K1_9;
G2_rega[8]_or_out = G2L23 # G2_rega[8]_p0_out # G2_rega[8]_p1_out # G2_rega[8]_p2_out # G2_rega[8]_p4_out;
G2_rega[8]_reg_input = G2_rega[8]_or_out;
G2_rega[8] = TFFE(G2_rega[8]_reg_input, D1_inst2, , , );


--G2_rega[7] is series_para_store:inst22|rega[7] at LC20
G2_rega[7]_p0_out = C1_inst1 & C1_inst4 & Q2_dffs[0] & Q2_dffs[1] & !Q2_dffs[3] & Q2_dffs[2] & G2_rega[7] & K1_8 & K1_9;
G2_rega[7]_p1_out = C1_inst1 & !C1_inst4 & Q2_dffs[0] & Q2_dffs[1] & !Q2_dffs[3] & Q2_dffs[2] & !G2_rega[7];
G2_rega[7]_p2_out = !C1_inst1 & C1_inst4 & Q2_dffs[0] & Q2_dffs[1] & !Q2_dffs[3] & Q2_dffs[2] & !G2_rega[7];
G2_rega[7]_p4_out = !C1_inst1 & !C1_inst4 & Q2_dffs[0] & Q2_dffs[1] & !Q2_dffs[3] & Q2_dffs[2] & G2_rega[7] & K1_8 & K1_9;
G2_rega[7]_or_out = G2L03 # G2_rega[7]_p0_out # G2_rega[7]_p1_out # G2_rega[7]_p2_out # G2_rega[7]_p4_out;
G2_rega[7]_reg_input = G2_rega[7]_or_out;
G2_rega[7] = TFFE(G2_rega[7]_reg_input, D1_inst2, , , );


--G2_rega[6] is series_para_store:inst22|rega[6] at LC22
G2_rega[6]_p0_out = C1_inst1 & C1_inst4 & Q2_dffs[1] & !Q2_dffs[0] & !Q2_dffs[3] & Q2_dffs[2] & G2_rega[6] & K1_8 & K1_9;
G2_rega[6]_p1_out = C1_inst1 & !C1_inst4 & Q2_dffs[1] & !Q2_dffs[0] & !Q2_dffs[3] & Q2_dffs[2] & !G2_rega[6];
G2_rega[6]_p2_out = !C1_inst1 & C1_inst4 & Q2_dffs[1] & !Q2_dffs[0] & !Q2_dffs[3] & Q2_dffs[2] & !G2_rega[6];
G2_rega[6]_p4_out = !C1_inst1 & !C1_inst4 & Q2_dffs[1] & !Q2_dffs[0] & !Q2_dffs[3] & Q2_dffs[2] & G2_rega[6] & K1_8 & K1_9;
G2_rega[6]_or_out = G2L82 # G2_rega[6]_p0_out # G2_rega[6]_p1_out # G2_rega[6]_p2_out # G2_rega[6]_p4_out;
G2_rega[6]_reg_input = G2_rega[6]_or_out;
G2_rega[6] = TFFE(G2_rega[6]_reg_input, D1_inst2, , , );


--G2_rega[5] is series_para_store:inst22|rega[5] at LC170
G2_rega[5]_p0_out = C1_inst1 & C1_inst4 & Q2_dffs[0] & !Q2_dffs[1] & !Q2_dffs[3] & Q2_dffs[2] & G2_rega[5] & K1_8 & K1_9;
G2_rega[5]_p1_out = C1_inst1 & !C1_inst4 & Q2_dffs[0] & !Q2_dffs[1] & !Q2_dffs[3] & Q2_dffs[2] & !G2_rega[5];
G2_rega[5]_p2_out = !C1_inst1 & C1_inst4 & Q2_dffs[0] & !Q2_dffs[1] & !Q2_dffs[3] & Q2_dffs[2] & !G2_rega[5];
G2_rega[5]_p4_out = !C1_inst1 & !C1_inst4 & Q2_dffs[0] & !Q2_dffs[1] & !Q2_dffs[3] & Q2_dffs[2] & G2_rega[5] & K1_8 & K1_9;
G2_rega[5]_or_out = G2L62 # G2_rega[5]_p0_out # G2_rega[5]_p1_out # G2_rega[5]_p2_out # G2_rega[5]_p4_out;
G2_rega[5]_reg_input = G2_rega[5]_or_out;
G2_rega[5] = TFFE(G2_rega[5]_reg_input, D1_inst2, , , );


--G2_rega[4] is series_para_store:inst22|rega[4] at LC168
G2_rega[4]_p0_out = C1_inst1 & C1_inst4 & !Q2_dffs[1] & !Q2_dffs[0] & !Q2_dffs[3] & Q2_dffs[2] & G2_rega[4] & K1_8 & K1_9;
G2_rega[4]_p1_out = C1_inst1 & !C1_inst4 & !Q2_dffs[1] & !Q2_dffs[0] & !Q2_dffs[3] & Q2_dffs[2] & !G2_rega[4];
G2_rega[4]_p2_out = !C1_inst1 & C1_inst4 & !Q2_dffs[1] & !Q2_dffs[0] & !Q2_dffs[3] & Q2_dffs[2] & !G2_rega[4];
G2_rega[4]_p4_out = !C1_inst1 & !C1_inst4 & !Q2_dffs[1] & !Q2_dffs[0] & !Q2_dffs[3] & Q2_dffs[2] & G2_rega[4] & K1_8 & K1_9;
G2_rega[4]_or_out = G2L42 # G2_rega[4]_p0_out # G2_rega[4]_p1_out # G2_rega[4]_p2_out # G2_rega[4]_p4_out;
G2_rega[4]_reg_input = G2_rega[4]_or_out;
G2_rega[4] = TFFE(G2_rega[4]_reg_input, D1_inst2, , , );


--G2_rega[3] is series_para_store:inst22|rega[3] at LC166
G2_rega[3]_p0_out = C1_inst1 & C1_inst4 & !Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & Q2_dffs[1] & G2_rega[3] & K1_8 & K1_9;
G2_rega[3]_p1_out = C1_inst1 & !C1_inst4 & !Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & Q2_dffs[1] & !G2_rega[3];
G2_rega[3]_p2_out = !C1_inst1 & C1_inst4 & !Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & Q2_dffs[1] & !G2_rega[3];
G2_rega[3]_p4_out = !C1_inst1 & !C1_inst4 & !Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & Q2_dffs[1] & G2_rega[3] & K1_8 & K1_9;
G2_rega[3]_or_out = G2L22 # G2_rega[3]_p0_out # G2_rega[3]_p1_out # G2_rega[3]_p2_out # G2_rega[3]_p4_out;
G2_rega[3]_reg_input = G2_rega[3]_or_out;
G2_rega[3] = TFFE(G2_rega[3]_reg_input, D1_inst2, , , );


--G2_rega[2] is series_para_store:inst22|rega[2] at LC164
G2_rega[2]_p0_out = C1_inst1 & C1_inst4 & Q2_dffs[1] & !Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & G2_rega[2] & K1_8 & K1_9;
G2_rega[2]_p1_out = C1_inst1 & !C1_inst4 & Q2_dffs[1] & !Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & !G2_rega[2];
G2_rega[2]_p2_out = !C1_inst1 & C1_inst4 & Q2_dffs[1] & !Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & !G2_rega[2];
G2_rega[2]_p4_out = !C1_inst1 & !C1_inst4 & Q2_dffs[1] & !Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & G2_rega[2] & K1_8 & K1_9;
G2_rega[2]_or_out = G2L02 # G2_rega[2]_p0_out # G2_rega[2]_p1_out # G2_rega[2]_p2_out # G2_rega[2]_p4_out;
G2_rega[2]_reg_input = G2_rega[2]_or_out;
G2_rega[2] = TFFE(G2_rega[2]_reg_input, D1_inst2, , , );


--G2_rega[1] is series_para_store:inst22|rega[1] at LC174
G2_rega[1]_p0_out = C1_inst1 & C1_inst4 & !Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & !Q2_dffs[1] & G2_rega[1] & K1_8 & K1_9;
G2_rega[1]_p1_out = C1_inst1 & !C1_inst4 & !Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & !Q2_dffs[1] & !G2_rega[1];
G2_rega[1]_p2_out = !C1_inst1 & C1_inst4 & !Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & !Q2_dffs[1] & !G2_rega[1];
G2_rega[1]_p4_out = !C1_inst1 & !C1_inst4 & !Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & !Q2_dffs[1] & G2_rega[1] & K1_8 & K1_9;
G2_rega[1]_or_out = G2L81 # G2_rega[1]_p0_out # G2_rega[1]_p1_out # G2_rega[1]_p2_out # G2_rega[1]_p4_out;
G2_rega[1]_reg_input = G2_rega[1]_or_out;
G2_rega[1] = TFFE(G2_rega[1]_reg_input, D1_inst2, , , );


--G2_rega[0] is series_para_store:inst22|rega[0] at LC172
G2_rega[0]_p0_out = C1_inst1 & C1_inst4 & !Q2_dffs[1] & !Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & G2_rega[0] & K1_8 & K1_9;
G2_rega[0]_p1_out = C1_inst1 & !C1_inst4 & !Q2_dffs[1] & !Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & !G2_rega[0];
G2_rega[0]_p2_out = !C1_inst1 & C1_inst4 & !Q2_dffs[1] & !Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & !G2_rega[0];
G2_rega[0]_p4_out = !C1_inst1 & !C1_inst4 & !Q2_dffs[1] & !Q2_dffs[3] & !Q2_dffs[2] & !Q2_dffs[0] & G2_rega[0] & K1_8 & K1_9;
G2_rega[0]_or_out = G2L61 # G2_rega[0]_p0_out # G2_rega[0]_p1_out # G2_rega[0]_p2_out # G2_rega[0]_p4_out;
G2_rega[0]_reg_input = G2_rega[0]_or_out;
G2_rega[0] = TFFE(G2_rega[0]_reg_input, D1_inst2, , , );


--G2_rega[11] is series_para_store:inst22|rega[11] at LC162
G2_rega[11]_p0_out = C1_inst1 & C1_inst4 & Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & Q2_dffs[1] & G2_rega[11] & K1_8 & K1_9;
G2_rega[11]_p1_out = C1_inst1 & !C1_inst4 & Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & Q2_dffs[1] & !G2_rega[11];
G2_rega[11]_p2_out = !C1_inst1 & C1_inst4 & Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & Q2_dffs[1] & !G2_rega[11];
G2_rega[11]_p4_out = !C1_inst1 & !C1_inst4 & Q2_dffs[3] & !Q2_dffs[2] & Q2_dffs[0] & Q2_dffs[1] & G2_rega[11] & K1_8 & K1_9;
G2_rega[11]_or_out = G2L83 # G2_rega[11]_p0_out # G2_rega[11]_p1_out # G2_rega[11]_p2_out # G2_rega[11]_p4_out;
G2_rega[11]_reg_input = G2_rega[11]_or_out;
G2_rega[11] = TFFE(G2_rega[11]_reg_input, D1_inst2, , , );


--G3_parallel[11] is series_para_store:inst23|parallel[11] at LC74
G3_parallel[11]_or_out = G3_rega[11];
G3_parallel[11]_reg_input = G3_parallel[11]_or_out;
G3_parallel[11] = DFFE(G3_parallel[11]_reg_input, L1_fs, , , );


--G3_parallel[10] is series_para_store:inst23|parallel[10] at LC70
G3_parallel[10]_or_out = G3_rega[10];
G3_parallel[10]_reg_input = G3_parallel[10]_or_out;
G3_parallel[10] = DFFE(G3_parallel[10]_reg_input, L1_fs, , , );


--G3_parallel[9] is series_para_store:inst23|parallel[9] at LC212
G3_parallel[9]_or_out = G3_rega[9];
G3_parallel[9]_reg_input = G3_parallel[9]_or_out;
G3_parallel[9] = DFFE(G3_parallel[9]_reg_input, L1_fs, , , );


--G3_parallel[8] is series_para_store:inst23|parallel[8] at LC141
G3_parallel[8]_or_out = G3_rega[8];
G3_parallel[8]_reg_input = G3_parallel[8]_or_out;
G3_parallel[8] = DFFE(G3_parallel[8]_reg_input, L1_fs, , , );


--G3_parallel[7] is series_para_store:inst23|parallel[7] at LC142
G3_parallel[7]_or_out = G3_rega[7];
G3_parallel[7]_reg_input = G3_parallel[7]_or_out;
G3_parallel[7] = DFFE(G3_parallel[7]_reg_input, L1_fs, , , );


--G3_parallel[6] is series_para_store:inst23|parallel[6] at LC144
G3_parallel[6]_or_out = G3_rega[6];
G3_parallel[6]_reg_input = G3_parallel[6]_or_out;
G3_parallel[6] = DFFE(G3_parallel[6]_reg_input, L1_fs, , , );


--G3_parallel[5] is series_para_store:inst23|parallel[5] at LC28
G3_parallel[5]_or_out = G3_rega[5];
G3_parallel[5]_reg_input = G3_parallel[5]_or_out;
G3_parallel[5] = DFFE(G3_parallel[5]_reg_input, L1_fs, , , );


--G3_parallel[4] is series_para_store:inst23|parallel[4] at LC30
G3_parallel[4]_or_out = G3_rega[4];
G3_parallel[4]_reg_input = G3_parallel[4]_or_out;
G3_parallel[4] = DFFE(G3_parallel[4]_reg_input, L1_fs, , , );


--G3_parallel[3] is series_para_store:inst23|parallel[3] at LC243
G3_parallel[3]_or_out = G3_rega[3];
G3_parallel[3]_reg_input = G3_parallel[3]_or_out;
G3_parallel[3] = DFFE(G3_parallel[3]_reg_input, L1_fs, , , );


--G3_parallel[2] is series_para_store:inst23|parallel[2] at LC76
G3_parallel[2]_or_out = G3_rega[2];
G3_parallel[2]_reg_input = G3_parallel[2]_or_out;
G3_parallel[2] = DFFE(G3_parallel[2]_reg_input, L1_fs, , , );


--G3_parallel[1] is series_para_store:inst23|parallel[1] at LC80
G3_parallel[1]_or_out = G3_rega[1];
G3_parallel[1]_reg_input = G3_parallel[1]_or_out;
G3_parallel[1] = DFFE(G3_parallel[1]_reg_input, L1_fs, , , );


--G3_parallel[0] is series_para_store:inst23|parallel[0] at LC77
G3_parallel[0]_or_out = G3_rega[0];
G3_parallel[0]_reg_input = G3_parallel[0]_or_out;
G3_parallel[0] = DFFE(G3_parallel[0]_reg_input, L1_fs, , , );


--G2_parallel[11] is series_para_store:inst22|parallel[11] at LC237
G2_parallel[11]_or_out = G2_rega[11];
G2_parallel[11]_reg_input = G2_parallel[11]_or_out;
G2_parallel[11] = DFFE(G2_parallel[11]_reg_input, L1_fs, , , );


--G2_parallel[10] is series_para_store:inst22|parallel[10] at LC239
G2_parallel[10]_or_out = G2_rega[10];
G2_parallel[10]_reg_input = G2_parallel[10]_or_out;
G2_parallel[10] = DFFE(G2_parallel[10]_reg_input, L1_fs, , , );


--G2_parallel[9] is series_para_store:inst22|parallel[9] at LC73
G2_parallel[9]_or_out = G2_rega[9];
G2_parallel[9]_reg_input = G2_parallel[9]_or_out;
G2_parallel[9] = DFFE(G2_parallel[9]_reg_input, L1_fs, , , );


--G2_parallel[8] is series_para_store:inst22|parallel[8] at LC32
G2_parallel[8]_or_out = G2_rega[8];
G2_parallel[8]_reg_input = G2_parallel[8]_or_out;
G2_parallel[8] = DFFE(G2_parallel[8]_reg_input, L1_fs, , , );


--G2_parallel[7] is series_para_store:inst22|pa