tcm0201.fit.eqn

在公司做的TCM编解码程序

--M1_parallel[17] is change:inst4|series_parallel:inst1|parallel[17] at LC10
M1_parallel[17]_or_out = M1_rega[17];
M1_parallel[17]_reg_input = M1_parallel[17]_or_out;
M1_parallel[17] = DFFE(M1_parallel[17]_reg_input, FS_IN, , , );


--M1_parallel[16] is change:inst4|series_parallel:inst1|parallel[16] at LC13
M1_parallel[16]_or_out = M1_rega[16];
M1_parallel[16]_reg_input = M1_parallel[16]_or_out;
M1_parallel[16] = DFFE(M1_parallel[16]_reg_input, FS_IN, , , );


--M1_parallel[15] is change:inst4|series_parallel:inst1|parallel[15] at LC226
M1_parallel[15]_or_out = M1_rega[15];
M1_parallel[15]_reg_input = M1_parallel[15]_or_out;
M1_parallel[15] = DFFE(M1_parallel[15]_reg_input, FS_IN, , , );


--M1_parallel[14] is change:inst4|series_parallel:inst1|parallel[14] at LC236
M1_parallel[14]_or_out = M1_rega[14];
M1_parallel[14]_reg_input = M1_parallel[14]_or_out;
M1_parallel[14] = DFFE(M1_parallel[14]_reg_input, FS_IN, , , );


--M1_parallel[13] is change:inst4|series_parallel:inst1|parallel[13] at LC225
M1_parallel[13]_or_out = M1_rega[13];
M1_parallel[13]_reg_input = M1_parallel[13]_or_out;
M1_parallel[13] = DFFE(M1_parallel[13]_reg_input, FS_IN, , , );


--M1_parallel[11] is change:inst4|series_parallel:inst1|parallel[11] at LC130
M1_parallel[11]_or_out = M1_rega[11];
M1_parallel[11]_reg_input = M1_parallel[11]_or_out;
M1_parallel[11] = DFFE(M1_parallel[11]_reg_input, FS_IN, , , );


--M1_parallel[7] is change:inst4|series_parallel:inst1|parallel[7] at LC129
M1_parallel[7]_or_out = M1_rega[7];
M1_parallel[7]_reg_input = M1_parallel[7]_or_out;
M1_parallel[7] = DFFE(M1_parallel[7]_reg_input, FS_IN, , , );


--M1_parallel[6] is change:inst4|series_parallel:inst1|parallel[6] at LC134
M1_parallel[6]_or_out = M1_rega[6];
M1_parallel[6]_reg_input = M1_parallel[6]_or_out;
M1_parallel[6] = DFFE(M1_parallel[6]_reg_input, FS_IN, , , );


--M1_parallel[5] is change:inst4|series_parallel:inst1|parallel[5] at LC137
M1_parallel[5]_or_out = M1_rega[5];
M1_parallel[5]_reg_input = M1_parallel[5]_or_out;
M1_parallel[5] = DFFE(M1_parallel[5]_reg_input, FS_IN, , , );


--M1_parallel[4] is change:inst4|series_parallel:inst1|parallel[4] at LC139
M1_parallel[4]_or_out = M1_rega[4];
M1_parallel[4]_reg_input = M1_parallel[4]_or_out;
M1_parallel[4] = DFFE(M1_parallel[4]_reg_input, FS_IN, , , );


--M1_parallel[3] is change:inst4|series_parallel:inst1|parallel[3] at LC138
M1_parallel[3]_or_out = M1_rega[3];
M1_parallel[3]_reg_input = M1_parallel[3]_or_out;
M1_parallel[3] = DFFE(M1_parallel[3]_reg_input, FS_IN, , , );


--M1_parallel[0] is change:inst4|series_parallel:inst1|parallel[0] at LC150
M1_parallel[0]_or_out = M1_rega[0];
M1_parallel[0]_reg_input = M1_parallel[0]_or_out;
M1_parallel[0] = DFFE(M1_parallel[0]_reg_input, FS_IN, , , );


--M1_parallel[10] is change:inst4|series_parallel:inst1|parallel[10] at LC153
M1_parallel[10]_or_out = M1_rega[10];
M1_parallel[10]_reg_input = M1_parallel[10]_or_out;
M1_parallel[10] = DFFE(M1_parallel[10]_reg_input, FS_IN, , , );


--M1_parallel[2] is change:inst4|series_parallel:inst1|parallel[2] at LC152
M1_parallel[2]_or_out = M1_rega[2];
M1_parallel[2]_reg_input = M1_parallel[2]_or_out;
M1_parallel[2] = DFFE(M1_parallel[2]_reg_input, FS_IN, , , );


--Q2_dffs[2] is series_para_store:inst19|lpm_counter:n_rtl_0|dffs[2] at LC67
Q2_dffs[2]_p1_out = Q2_dffs[0] & Q2_dffs[1];
Q2_dffs[2]_or_out = Q2_dffs[2]_p1_out;
Q2_dffs[2]_reg_input = Q2_dffs[2]_or_out;
Q2_dffs[2] = TFFE(Q2_dffs[2]_reg_input, !D1_inst2, !L1_fs, , );


--L1L7 is change:inst4|parallel_series:inst|digit[6]~116 at LC82
L1L7_p1_out = M1_parallel[12] & FS_IN;
L1L7_p2_out = !FS_IN & L1L7;
L1L7_p3_out = M1_parallel[12] & L1L7;
L1L7_or_out = L1L7_p1_out # L1L7_p2_out # L1L7_p3_out;
L1L7 = L1L7_or_out;


--L1L5 is change:inst4|parallel_series:inst|digit[4]~120 at LC84
L1L5_p1_out = M1_parallel[8] & FS_IN;
L1L5_p2_out = !FS_IN & L1L5;
L1L5_p3_out = M1_parallel[8] & L1L5;
L1L5_or_out = L1L5_p1_out # L1L5_p2_out # L1L5_p3_out;
L1L5 = L1L5_or_out;


--L2L1 is change:inst4|parallel_series:inst5|digit[0]~116 at LC191
L2L1_p1_out = M1_parallel[1] & FS_IN;
L2L1_p2_out = !FS_IN & L2L1;
L2L1_p3_out = M1_parallel[1] & L2L1;
L2L1_or_out = L2L1_p1_out # L2L1_p2_out # L2L1_p3_out;
L2L1 = L2L1_or_out;


--L2L5 is change:inst4|parallel_series:inst5|digit[4]~120 at LC190
L2L5_p1_out = M1_parallel[9] & FS_IN;
L2L5_p2_out = !FS_IN & L2L5;
L2L5_p3_out = M1_parallel[9] & L2L5;
L2L5_or_out = L2L5_p1_out # L2L5_p2_out # L2L5_p3_out;
L2L5 = L2L5_or_out;


--L1L3 is change:inst4|parallel_series:inst|digit[2]~124 at LC95
L1L3_p1_out = M1_parallel[4] & FS_IN;
L1L3_p2_out = !FS_IN & L1L3;
L1L3_p3_out = M1_parallel[4] & L1L3;
L1L3_or_out = L1L3_p1_out # L1L3_p2_out # L1L3_p3_out;
L1L3 = L1L3_or_out;


--L1L4 is change:inst4|parallel_series:inst|digit[3]~128 at LC96
L1L4_p1_out = M1_parallel[6] & FS_IN;
L1L4_p2_out = !FS_IN & L1L4;
L1L4_p3_out = M1_parallel[6] & L1L4;
L1L4_or_out = L1L4_p1_out # L1L4_p2_out # L1L4_p3_out;
L1L4 = L1L4_or_out;


--L1L1 is change:inst4|parallel_series:inst|digit[0]~132 at LC94
L1L1_p1_out = M1_parallel[0] & FS_IN;
L1L1_p2_out = !FS_IN & L1L1;
L1L1_p3_out = M1_parallel[0] & L1L1;
L1L1_or_out = L1L1_p1_out # L1L1_p2_out # L1L1_p3_out;
L1L1 = L1L1_or_out;


--L1L8 is change:inst4|parallel_series:inst|digit[7]~136 at LC93
L1L8_p1_out = M1_parallel[14] & FS_IN;
L1L8_p2_out = !FS_IN & L1L8;
L1L8_p3_out = M1_parallel[14] & L1L8;
L1L8_or_out = L1L8_p1_out # L1L8_p2_out # L1L8_p3_out;
L1L8 = L1L8_or_out;


--L1L01 is change:inst4|parallel_series:inst|digit[9]~140 at LC91
L1L01_p1_out = M1_parallel[18] & FS_IN;
L1L01_p2_out = !FS_IN & L1L01;
L1L01_p3_out = M1_parallel[18] & L1L01;
L1L01_or_out = L1L01_p1_out # L1L01_p2_out # L1L01_p3_out;
L1L01 = L1L01_or_out;


--L1L21 is change:inst4|parallel_series:inst|digit[11]~144 at LC88
L1L21_p1_out = M1_parallel[22] & FS_IN;
L1L21_p2_out = !FS_IN & L1L21;
L1L21_p3_out = M1_parallel[22] & L1L21;
L1L21_or_out = L1L21_p1_out # L1L21_p2_out # L1L21_p3_out;
L1L21 = L1L21_or_out;


--L1L9 is change:inst4|parallel_series:inst|digit[8]~148 at LC87
L1L9_p1_out = M1_parallel[16] & FS_IN;
L1L9_p2_out = !FS_IN & L1L9;
L1L9_p3_out = M1_parallel[16] & L1L9;
L1L9_or_out = L1L9_p1_out # L1L9_p2_out # L1L9_p3_out;
L1L9 = L1L9_or_out;


--L1L11 is change:inst4|parallel_series:inst|digit[10]~152 at LC86
L1L11_p1_out = M1_parallel[20] & FS_IN;
L1L11_p2_out = !FS_IN & L1L11;
L1L11_p3_out = M1_parallel[20] & L1L11;
L1L11_or_out = L1L11_p1_out # L1L11_p2_out # L1L11_p3_out;
L1L11 = L1L11_or_out;


--L2L3 is change:inst4|parallel_series:inst5|digit[2]~124 at LC186
L2L3_p1_out = M1_parallel[5] & FS_IN;
L2L3_p2_out = !FS_IN & L2L3;
L2L3_p3_out = M1_parallel[5] & L2L3;
L2L3_or_out = L2L3_p1_out # L2L3_p2_out # L2L3_p3_out;
L2L3 = L2L3_or_out;


--L2L4 is change:inst4|parallel_series:inst5|digit[3]~128 at LC184
L2L4_p1_out = M1_parallel[7] & FS_IN;
L2L4_p2_out = !FS_IN & L2L4;
L2L4_p3_out = M1_parallel[7] & L2L4;
L2L4_or_out = L2L4_p1_out # L2L4_p2_out # L2L4_p3_out;
L2L4 = L2L4_or_out;


--L2L2 is change:inst4|parallel_series:inst5|digit[1]~132 at LC183
L2L2_p1_out = M1_parallel[3] & FS_IN;
L2L2_p2_out = !FS_IN & L2L2;
L2L2_p3_out = M1_parallel[3] & L2L2;
L2L2_or_out = L2L2_p1_out # L2L2_p2_out # L2L2_p3_out;
L2L2 = L2L2_or_out;


--L2L7 is change:inst4|parallel_series:inst5|digit[6]~136 at LC180
L2L7_p1_out = M1_parallel[13] & FS_IN;
L2L7_p2_out = !FS_IN & L2L7;
L2L7_p3_out = M1_parallel[13] & L2L7;
L2L7_or_out = L2L7_p1_out # L2L7_p2_out # L2L7_p3_out;
L2L7 = L2L7_or_out;


--L2L8 is change:inst4|parallel_series:inst5|digit[7]~140 at LC179
L2L8_p1_out = M1_parallel[15] & FS_IN;
L2L8_p2_out = !FS_IN & L2L8;
L2L8_p3_out = M1_parallel[15] & L2L8;
L2L8_or_out = L2L8_p1_out # L2L8_p2_out # L2L8_p3_out;
L2L8 = L2L8_or_out;


--L2L6 is change:inst4|parallel_series:inst5|digit[5]~144 at LC185
L2L6_p1_out = M1_parallel[11] & FS_IN;
L2L6_p2_out = !FS_IN & L2L6;
L2L6_p3_out = M1_parallel[11] & L2L6;
L2L6_or_out = L2L6_p1_out # L2L6_p2_out # L2L6_p3_out;
L2L6 = L2L6_or_out;


--L2L01 is change:inst4|parallel_series:inst5|digit[9]~148 at LC181
L2L01_p1_out = M1_parallel[19] & FS_IN;
L2L01_p2_out = !FS_IN & L2L01;
L2L01_p3_out = M1_parallel[19] & L2L01;
L2L01_or_out = L2L01_p1_out # L2L01_p2_out # L2L01_p3_out;
L2L01 = L2L01_or_out;


--L2L21 is change:inst4|parallel_series:inst5|digit[11]~152 at LC111
L2L21_p1_out = M1_parallel[23] & FS_IN;
L2L21_p2_out = !FS_IN & L2L21;
L2L21_p3_out = M1_parallel[23] & L2L21;
L2L21_or_out = L2L21_p1_out # L2L21_p2_out # L2L21_p3_out;
L2L21 = L2L21_or_out;


--L2L9 is change:inst4|parallel_series:inst5|digit[8]~156 at LC112
L2L9_p1_out = M1_parallel[17] & FS_IN;
L2L9_p2_out = !FS_IN & L2L9;
L2L9_p3_out = M1_parallel[17] & L2L9;
L2L9_or_out = L2L9_p1_out # L2L9_p2_out # L2L9_p3_out;
L2L9 = L2L9_or_out;


--L2L11 is change:inst4|parallel_series:inst5|digit[10]~160 at LC101
L2L11_p1_out = M1_parallel[21] & FS_IN;
L2L11_p2_out = !FS_IN & L2L11;
L2L11_p3_out = M1_parallel[21] & L2L11;
L2L11_or_out = L2L11_p1_out # L2L11_p2_out # L2L11_p3_out;
L2L11 = L2L11_or_out;


--S1_temp[5] is 3IN12:inst7|fenpin_36:inst1|temp[5] at LC16
S1_temp[5]_p1_out = !S1_temp[4] & !S1_temp[3] & !S1_temp[2] & S1_temp[1] & S1_temp[5] & S1_temp[0];
S1_temp[5]_p2_out = S1_temp[4] & S1_temp[3] & S1_temp[2] & S1_temp[1] & S1_temp[0];
S1_temp[5]_or_out = S1_temp[5]_p1_out # S1_temp[5]_p2_out;
S1_temp[5]_reg_input = S1_temp[5]_or_out;
S1_temp[5] = TFFE(S1_temp[5]_reg_input, R2_3, , , );


--Q2_dffs[3] is series_para_store:inst19|lpm_counter:n_rtl_0|dffs[3] at LC24
Q2_dffs[3]_p1_out = Q2_dffs[2] & Q2_dffs[0] & Q2_dffs[1];
Q2_dffs[3]_or_out = Q2_dffs[3]_p1_out;
Q2_dffs[3]_reg_input = Q2_dffs[3]_or_out;
Q2_dffs[3] = TFFE(Q2_dffs[3]_reg_input, !D1_inst2, !L1_fs, , );


--L1L2 is change:inst4|parallel_series:inst|digit[1]~156 at LC81
L1L2_p1_out = M1_parallel[2] & FS_IN;
L1L2_p2_out = !FS_IN & L1L2;
L1L2_p3_out = M1_parallel[2] & L1L2;
L1L2_or_out = L1L2_p1_out # L1L2_p2_out # L1L2_p3_out;
L1L2 = L1L2_or_out;


--L1L6 is change:inst4|parallel_series:inst|digit[5]~160 at LC85
L1L6_p1_out = M1_parallel[10] & FS_IN;